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Searched refs:IMX8ULP_CLK_PLL4_PFD1_DIV2_GATE (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dimx8ulp-clock.h83 #define IMX8ULP_CLK_PLL4_PFD1_DIV2_GATE 16 macro
/linux/drivers/clk/imx/
H A Dclk-imx8ulp.c273 …clks[IMX8ULP_CLK_PLL4_PFD1_DIV2_GATE] = imx_clk_hw_gate_dis("pll4_pfd1_div2_gate", "pll4_pfd1", ba… in imx8ulp_clk_cgc2_init()