1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Ilitek ILI9341 TFT LCD drm_panel driver.
4 *
5 * This panel can be configured to support:
6 * - 16-bit parallel RGB interface
7 * - 18-bit parallel RGB interface
8 * - 4-line serial spi interface
9 *
10 * Copyright (C) 2021 Dillon Min <dillon.minfei@gmail.com>
11 *
12 * For dbi+dpi part:
13 * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
14 * the reuse of DBI abstraction part referred from Linus's patch
15 * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
16 */
17
18 #include <linux/backlight.h>
19 #include <linux/bitops.h>
20 #include <linux/delay.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/module.h>
23 #include <linux/property.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/spi/spi.h>
26
27 #include <video/mipi_display.h>
28
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_drv.h>
31 #include <drm/drm_fbdev_dma.h>
32 #include <drm/drm_gem_atomic_helper.h>
33 #include <drm/drm_gem_dma_helper.h>
34 #include <drm/drm_gem_framebuffer_helper.h>
35 #include <drm/drm_mipi_dbi.h>
36 #include <drm/drm_modes.h>
37 #include <drm/drm_panel.h>
38 #include <drm/drm_print.h>
39
40 #define ILI9341_RGB_INTERFACE 0xb0 /* RGB Interface Signal Control */
41 #define ILI9341_FRC 0xb1 /* Frame Rate Control register */
42 #define ILI9341_DFC 0xb6 /* Display Function Control register */
43 #define ILI9341_POWER1 0xc0 /* Power Control 1 register */
44 #define ILI9341_POWER2 0xc1 /* Power Control 2 register */
45 #define ILI9341_VCOM1 0xc5 /* VCOM Control 1 register */
46 #define ILI9341_VCOM2 0xc7 /* VCOM Control 2 register */
47 #define ILI9341_POWERA 0xcb /* Power control A register */
48 #define ILI9341_POWERB 0xcf /* Power control B register */
49 #define ILI9341_PGAMMA 0xe0 /* Positive Gamma Correction register */
50 #define ILI9341_NGAMMA 0xe1 /* Negative Gamma Correction register */
51 #define ILI9341_DTCA 0xe8 /* Driver timing control A */
52 #define ILI9341_DTCB 0xea /* Driver timing control B */
53 #define ILI9341_POWER_SEQ 0xed /* Power on sequence register */
54 #define ILI9341_3GAMMA_EN 0xf2 /* 3 Gamma enable register */
55 #define ILI9341_INTERFACE 0xf6 /* Interface control register */
56 #define ILI9341_PRC 0xf7 /* Pump ratio control register */
57 #define ILI9341_ETMOD 0xb7 /* Entry mode set */
58
59 #define ILI9341_MADCTL_BGR BIT(3)
60 #define ILI9341_MADCTL_MV BIT(5)
61 #define ILI9341_MADCTL_MX BIT(6)
62 #define ILI9341_MADCTL_MY BIT(7)
63
64 #define ILI9341_POWER_B_LEN 3
65 #define ILI9341_POWER_SEQ_LEN 4
66 #define ILI9341_DTCA_LEN 3
67 #define ILI9341_DTCB_LEN 2
68 #define ILI9341_POWER_A_LEN 5
69 #define ILI9341_DFC_1_LEN 2
70 #define ILI9341_FRC_LEN 2
71 #define ILI9341_VCOM_1_LEN 2
72 #define ILI9341_DFC_2_LEN 4
73 #define ILI9341_COLUMN_ADDR_LEN 4
74 #define ILI9341_PAGE_ADDR_LEN 4
75 #define ILI9341_INTERFACE_LEN 3
76 #define ILI9341_PGAMMA_LEN 15
77 #define ILI9341_NGAMMA_LEN 15
78 #define ILI9341_CA_LEN 3
79
80 #define ILI9341_PIXEL_DPI_16_BITS (BIT(6) | BIT(4))
81 #define ILI9341_PIXEL_DPI_18_BITS (BIT(6) | BIT(5))
82 #define ILI9341_GAMMA_CURVE_1 BIT(0)
83 #define ILI9341_IF_WE_MODE BIT(0)
84 #define ILI9341_IF_BIG_ENDIAN 0x00
85 #define ILI9341_IF_DM_RGB BIT(2)
86 #define ILI9341_IF_DM_INTERNAL 0x00
87 #define ILI9341_IF_DM_VSYNC BIT(3)
88 #define ILI9341_IF_RM_RGB BIT(1)
89 #define ILI9341_IF_RIM_RGB 0x00
90
91 #define ILI9341_COLUMN_ADDR 0x00ef
92 #define ILI9341_PAGE_ADDR 0x013f
93
94 #define ILI9341_RGB_EPL BIT(0)
95 #define ILI9341_RGB_DPL BIT(1)
96 #define ILI9341_RGB_HSPL BIT(2)
97 #define ILI9341_RGB_VSPL BIT(3)
98 #define ILI9341_RGB_DE_MODE BIT(6)
99 #define ILI9341_RGB_DISP_PATH_MEM BIT(7)
100
101 #define ILI9341_DBI_VCOMH_4P6V 0x23
102 #define ILI9341_DBI_PWR_2_DEFAULT 0x10
103 #define ILI9341_DBI_PRC_NORMAL 0x20
104 #define ILI9341_DBI_VCOM_1_VMH_4P25V 0x3e
105 #define ILI9341_DBI_VCOM_1_VML_1P5V 0x28
106 #define ILI9341_DBI_VCOM_2_DEC_58 0x86
107 #define ILI9341_DBI_FRC_DIVA 0x00
108 #define ILI9341_DBI_FRC_RTNA 0x1b
109 #define ILI9341_DBI_EMS_GAS BIT(0)
110 #define ILI9341_DBI_EMS_DTS BIT(1)
111 #define ILI9341_DBI_EMS_GON BIT(2)
112
113 /* struct ili9341_config - the system specific ILI9341 configuration */
114 struct ili9341_config {
115 u32 max_spi_speed;
116 /* mode: the drm display mode */
117 const struct drm_display_mode mode;
118 /* ca: TODO: need comments for this register */
119 u8 ca[ILI9341_CA_LEN];
120 /* power_b: Power control B (CFh) */
121 u8 power_b[ILI9341_POWER_B_LEN];
122 /* power_seq: Power on sequence control (EDh) */
123 u8 power_seq[ILI9341_POWER_SEQ_LEN];
124 /* dtca: Driver timing control A (E8h) */
125 u8 dtca[ILI9341_DTCA_LEN];
126 /* dtcb: Driver timing control B (EAh) */
127 u8 dtcb[ILI9341_DTCB_LEN];
128 /* power_a: Power control A (CBh) */
129 u8 power_a[ILI9341_POWER_A_LEN];
130 /* frc: Frame Rate Control (In Normal Mode/Full Colors) (B1h) */
131 u8 frc[ILI9341_FRC_LEN];
132 /* prc: Pump ratio control (F7h) */
133 u8 prc;
134 /* dfc_1: B6h DISCTRL (Display Function Control) */
135 u8 dfc_1[ILI9341_DFC_1_LEN];
136 /* power_1: Power Control 1 (C0h) */
137 u8 power_1;
138 /* power_2: Power Control 2 (C1h) */
139 u8 power_2;
140 /* vcom_1: VCOM Control 1(C5h) */
141 u8 vcom_1[ILI9341_VCOM_1_LEN];
142 /* vcom_2: VCOM Control 2(C7h) */
143 u8 vcom_2;
144 /* address_mode: Memory Access Control (36h) */
145 u8 address_mode;
146 /* g3amma_en: Enable 3G (F2h) */
147 u8 g3amma_en;
148 /* rgb_interface: RGB Interface Signal Control (B0h) */
149 u8 rgb_interface;
150 /* dfc_2: refer to dfc_1 */
151 u8 dfc_2[ILI9341_DFC_2_LEN];
152 /* column_addr: Column Address Set (2Ah) */
153 u8 column_addr[ILI9341_COLUMN_ADDR_LEN];
154 /* page_addr: Page Address Set (2Bh) */
155 u8 page_addr[ILI9341_PAGE_ADDR_LEN];
156 /* interface: Interface Control (F6h) */
157 u8 interface[ILI9341_INTERFACE_LEN];
158 /*
159 * pixel_format: This command sets the pixel format for the RGB
160 * image data used by
161 */
162 u8 pixel_format;
163 /*
164 * gamma_curve: This command is used to select the desired Gamma
165 * curve for the
166 */
167 u8 gamma_curve;
168 /* pgamma: Positive Gamma Correction (E0h) */
169 u8 pgamma[ILI9341_PGAMMA_LEN];
170 /* ngamma: Negative Gamma Correction (E1h) */
171 u8 ngamma[ILI9341_NGAMMA_LEN];
172 };
173
174 struct ili9341 {
175 const struct ili9341_config *conf;
176 struct drm_panel panel;
177 struct gpio_desc *reset_gpio;
178 struct gpio_desc *dc_gpio;
179 struct mipi_dbi *dbi;
180 u32 max_spi_speed;
181 struct regulator_bulk_data supplies[3];
182 };
183
184 /*
185 * The Stm32f429-disco board has a panel ili9341 connected to ltdc controller
186 */
187 static const struct ili9341_config ili9341_stm32f429_disco_data = {
188 .max_spi_speed = 10000000,
189 .mode = {
190 .clock = 6100,
191 .hdisplay = 240,
192 .hsync_start = 240 + 10,/* hfp 10 */
193 .hsync_end = 240 + 10 + 10,/* hsync 10 */
194 .htotal = 240 + 10 + 10 + 20,/* hbp 20 */
195 .vdisplay = 320,
196 .vsync_start = 320 + 4,/* vfp 4 */
197 .vsync_end = 320 + 4 + 2,/* vsync 2 */
198 .vtotal = 320 + 4 + 2 + 2,/* vbp 2 */
199 .flags = 0,
200 .width_mm = 65,
201 .height_mm = 50,
202 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
203 },
204 .ca = {0xc3, 0x08, 0x50},
205 .power_b = {0x00, 0xc1, 0x30},
206 .power_seq = {0x64, 0x03, 0x12, 0x81},
207 .dtca = {0x85, 0x00, 0x78},
208 .power_a = {0x39, 0x2c, 0x00, 0x34, 0x02},
209 .prc = 0x20,
210 .dtcb = {0x00, 0x00},
211 /* 0x00 fosc, 0x1b 70hz */
212 .frc = {0x00, 0x1b},
213 /*
214 * 0x0a Interval scan, AGND AGND AGND AGND
215 * 0xa2 Normally white, G1 -> G320, S720 -> S1,
216 * Scan Cycle 5 frames,85ms
217 */
218 .dfc_1 = {0x0a, 0xa2},
219 /* 0x10 3.65v */
220 .power_1 = 0x10,
221 /* 0x10 AVDD=vci*2, VGH=vci*7, VGL=-vci*4 */
222 .power_2 = 0x10,
223 /* 0x45 VCOMH 4.425v, 0x15 VCOML -1.975*/
224 .vcom_1 = {0x45, 0x15},
225 /* 0x90 offset voltage, VMH-48, VML-48 */
226 .vcom_2 = 0x90,
227 /*
228 * 0xc8 Row Address Order, Column Address Order
229 * BGR 1
230 */
231 .address_mode = 0xc8,
232 .g3amma_en = 0x00,
233 /*
234 * 0xc2
235 * Display Data Path: Memory
236 * RGB: DE mode
237 * DOTCLK polarity set (data fetched at the falling time)
238 */
239 .rgb_interface = ILI9341_RGB_DISP_PATH_MEM |
240 ILI9341_RGB_DE_MODE |
241 ILI9341_RGB_DPL,
242 /*
243 * 0x0a
244 * Gate outputs in non-display area: Interval scan
245 * Determine source/VCOM output in a non-display area in the partial
246 * display mode: AGND AGND AGND AGND
247 *
248 * 0xa7
249 * Scan Cycle: 15 frames
250 * fFLM = 60Hz: 255ms
251 * Liquid crystal type: Normally white
252 * Gate Output Scan Direction: G1 -> G320
253 * Source Output Scan Direction: S720 -> S1
254 *
255 * 0x27
256 * LCD Driver Line: 320 lines
257 *
258 * 0x04
259 * PCDIV: 4
260 */
261 .dfc_2 = {0x0a, 0xa7, 0x27, 0x04},
262 /* column address: 240 */
263 .column_addr = {0x00, 0x00, (ILI9341_COLUMN_ADDR >> 4) & 0xff,
264 ILI9341_COLUMN_ADDR & 0xff},
265 /* page address: 320 */
266 .page_addr = {0x00, 0x00, (ILI9341_PAGE_ADDR >> 4) & 0xff,
267 ILI9341_PAGE_ADDR & 0xff},
268 /*
269 * Memory write control: When the transfer number of data exceeds
270 * (EC-SC+1)*(EP-SP+1), the column and page number will be
271 * reset, and the exceeding data will be written into the following
272 * column and page.
273 * Display Operation Mode: RGB Interface Mode
274 * Interface for RAM Access: RGB interface
275 * 16- bit RGB interface (1 transfer/pixel)
276 */
277 .interface = {ILI9341_IF_WE_MODE, 0x00,
278 ILI9341_IF_DM_RGB | ILI9341_IF_RM_RGB},
279 /* DPI: 16 bits / pixel */
280 .pixel_format = ILI9341_PIXEL_DPI_16_BITS,
281 /* Curve Selected: Gamma curve 1 (G2.2) */
282 .gamma_curve = ILI9341_GAMMA_CURVE_1,
283 .pgamma = {0x0f, 0x29, 0x24, 0x0c, 0x0e,
284 0x09, 0x4e, 0x78, 0x3c, 0x09,
285 0x13, 0x05, 0x17, 0x11, 0x00},
286 .ngamma = {0x00, 0x16, 0x1b, 0x04, 0x11,
287 0x07, 0x31, 0x33, 0x42, 0x05,
288 0x0c, 0x0a, 0x28, 0x2f, 0x0f},
289 };
290
panel_to_ili9341(struct drm_panel * panel)291 static inline struct ili9341 *panel_to_ili9341(struct drm_panel *panel)
292 {
293 return container_of(panel, struct ili9341, panel);
294 }
295
ili9341_dpi_init(struct ili9341 * ili)296 static void ili9341_dpi_init(struct ili9341 *ili)
297 {
298 struct device *dev = (&ili->panel)->dev;
299 struct mipi_dbi *dbi = ili->dbi;
300 struct ili9341_config *cfg = (struct ili9341_config *)ili->conf;
301
302 /* Power Control */
303 mipi_dbi_command_stackbuf(dbi, 0xca, cfg->ca, ILI9341_CA_LEN);
304 mipi_dbi_command_stackbuf(dbi, ILI9341_POWERB, cfg->power_b,
305 ILI9341_POWER_B_LEN);
306 mipi_dbi_command_stackbuf(dbi, ILI9341_POWER_SEQ, cfg->power_seq,
307 ILI9341_POWER_SEQ_LEN);
308 mipi_dbi_command_stackbuf(dbi, ILI9341_DTCA, cfg->dtca,
309 ILI9341_DTCA_LEN);
310 mipi_dbi_command_stackbuf(dbi, ILI9341_POWERA, cfg->power_a,
311 ILI9341_POWER_A_LEN);
312 mipi_dbi_command(ili->dbi, ILI9341_PRC, cfg->prc);
313 mipi_dbi_command_stackbuf(dbi, ILI9341_DTCB, cfg->dtcb,
314 ILI9341_DTCB_LEN);
315 mipi_dbi_command_stackbuf(dbi, ILI9341_FRC, cfg->frc, ILI9341_FRC_LEN);
316 mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_1,
317 ILI9341_DFC_1_LEN);
318 mipi_dbi_command(dbi, ILI9341_POWER1, cfg->power_1);
319 mipi_dbi_command(dbi, ILI9341_POWER2, cfg->power_2);
320
321 /* VCOM */
322 mipi_dbi_command_stackbuf(dbi, ILI9341_VCOM1, cfg->vcom_1,
323 ILI9341_VCOM_1_LEN);
324 mipi_dbi_command(dbi, ILI9341_VCOM2, cfg->vcom_2);
325 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, cfg->address_mode);
326
327 /* Gamma */
328 mipi_dbi_command(dbi, ILI9341_3GAMMA_EN, cfg->g3amma_en);
329 mipi_dbi_command(dbi, ILI9341_RGB_INTERFACE, cfg->rgb_interface);
330 mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_2,
331 ILI9341_DFC_2_LEN);
332
333 /* Colomn address set */
334 mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_COLUMN_ADDRESS,
335 cfg->column_addr, ILI9341_COLUMN_ADDR_LEN);
336
337 /* Page address set */
338 mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_PAGE_ADDRESS,
339 cfg->page_addr, ILI9341_PAGE_ADDR_LEN);
340 mipi_dbi_command_stackbuf(dbi, ILI9341_INTERFACE, cfg->interface,
341 ILI9341_INTERFACE_LEN);
342
343 /* Format */
344 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, cfg->pixel_format);
345 mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
346 msleep(200);
347 mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, cfg->gamma_curve);
348 mipi_dbi_command_stackbuf(dbi, ILI9341_PGAMMA, cfg->pgamma,
349 ILI9341_PGAMMA_LEN);
350 mipi_dbi_command_stackbuf(dbi, ILI9341_NGAMMA, cfg->ngamma,
351 ILI9341_NGAMMA_LEN);
352 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
353 msleep(200);
354 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
355 mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
356
357 dev_info(dev, "Initialized display rgb interface\n");
358 }
359
ili9341_dpi_power_on(struct ili9341 * ili)360 static int ili9341_dpi_power_on(struct ili9341 *ili)
361 {
362 struct device *dev = (&ili->panel)->dev;
363 int ret = 0;
364
365 /* Assert RESET */
366 gpiod_set_value(ili->reset_gpio, 1);
367
368 /* Enable power */
369 ret = regulator_bulk_enable(ARRAY_SIZE(ili->supplies),
370 ili->supplies);
371 if (ret < 0) {
372 dev_err(dev, "unable to enable vcc\n");
373 return ret;
374 }
375 msleep(20);
376
377 /* De-assert RESET */
378 gpiod_set_value(ili->reset_gpio, 0);
379 msleep(20);
380
381 return 0;
382 }
383
ili9341_dpi_power_off(struct ili9341 * ili)384 static int ili9341_dpi_power_off(struct ili9341 *ili)
385 {
386 /* Assert RESET */
387 gpiod_set_value(ili->reset_gpio, 1);
388
389 /* Disable power */
390 return regulator_bulk_disable(ARRAY_SIZE(ili->supplies),
391 ili->supplies);
392 }
393
ili9341_dpi_disable(struct drm_panel * panel)394 static int ili9341_dpi_disable(struct drm_panel *panel)
395 {
396 struct ili9341 *ili = panel_to_ili9341(panel);
397
398 mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_OFF);
399 return 0;
400 }
401
ili9341_dpi_unprepare(struct drm_panel * panel)402 static int ili9341_dpi_unprepare(struct drm_panel *panel)
403 {
404 struct ili9341 *ili = panel_to_ili9341(panel);
405
406 return ili9341_dpi_power_off(ili);
407 }
408
ili9341_dpi_prepare(struct drm_panel * panel)409 static int ili9341_dpi_prepare(struct drm_panel *panel)
410 {
411 struct ili9341 *ili = panel_to_ili9341(panel);
412 int ret;
413
414 ret = ili9341_dpi_power_on(ili);
415 if (ret < 0)
416 return ret;
417
418 ili9341_dpi_init(ili);
419
420 return 0;
421 }
422
ili9341_dpi_enable(struct drm_panel * panel)423 static int ili9341_dpi_enable(struct drm_panel *panel)
424 {
425 struct ili9341 *ili = panel_to_ili9341(panel);
426
427 mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_ON);
428 return 0;
429 }
430
ili9341_dpi_get_modes(struct drm_panel * panel,struct drm_connector * connector)431 static int ili9341_dpi_get_modes(struct drm_panel *panel,
432 struct drm_connector *connector)
433 {
434 struct ili9341 *ili = panel_to_ili9341(panel);
435 struct drm_device *drm = connector->dev;
436 struct drm_display_mode *mode;
437 struct drm_display_info *info;
438
439 info = &connector->display_info;
440 info->width_mm = ili->conf->mode.width_mm;
441 info->height_mm = ili->conf->mode.height_mm;
442
443 if (ili->conf->rgb_interface & ILI9341_RGB_DPL)
444 info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
445 else
446 info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
447
448 if (ili->conf->rgb_interface & ILI9341_RGB_EPL)
449 info->bus_flags |= DRM_BUS_FLAG_DE_LOW;
450 else
451 info->bus_flags |= DRM_BUS_FLAG_DE_HIGH;
452
453 mode = drm_mode_duplicate(drm, &ili->conf->mode);
454 if (!mode) {
455 drm_err(drm, "bad mode or failed to add mode\n");
456 return -EINVAL;
457 }
458 drm_mode_set_name(mode);
459
460 /* Set up the polarity */
461 if (ili->conf->rgb_interface & ILI9341_RGB_HSPL)
462 mode->flags |= DRM_MODE_FLAG_PHSYNC;
463 else
464 mode->flags |= DRM_MODE_FLAG_NHSYNC;
465
466 if (ili->conf->rgb_interface & ILI9341_RGB_VSPL)
467 mode->flags |= DRM_MODE_FLAG_PVSYNC;
468 else
469 mode->flags |= DRM_MODE_FLAG_NVSYNC;
470
471 drm_mode_probed_add(connector, mode);
472
473 return 1; /* Number of modes */
474 }
475
476 static const struct drm_panel_funcs ili9341_dpi_funcs = {
477 .disable = ili9341_dpi_disable,
478 .unprepare = ili9341_dpi_unprepare,
479 .prepare = ili9341_dpi_prepare,
480 .enable = ili9341_dpi_enable,
481 .get_modes = ili9341_dpi_get_modes,
482 };
483
ili9341_dpi_probe(struct spi_device * spi,struct gpio_desc * dc,struct gpio_desc * reset)484 static int ili9341_dpi_probe(struct spi_device *spi, struct gpio_desc *dc,
485 struct gpio_desc *reset)
486 {
487 struct device *dev = &spi->dev;
488 struct ili9341 *ili;
489 int ret;
490
491 ili = devm_drm_panel_alloc(dev, struct ili9341, panel,
492 &ili9341_dpi_funcs,
493 DRM_MODE_CONNECTOR_DPI);
494 if (IS_ERR(ili))
495 return PTR_ERR(ili);
496
497 ili->dbi = devm_kzalloc(dev, sizeof(struct mipi_dbi),
498 GFP_KERNEL);
499 if (!ili->dbi)
500 return -ENOMEM;
501
502 ili->supplies[0].supply = "vci";
503 ili->supplies[1].supply = "vddi";
504 ili->supplies[2].supply = "vddi-led";
505 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ili->supplies),
506 ili->supplies);
507 if (ret < 0) {
508 dev_err(dev, "failed to get regulators: %d\n", ret);
509 return ret;
510 }
511
512 ret = mipi_dbi_spi_init(spi, ili->dbi, dc);
513 if (ret)
514 return ret;
515
516 spi_set_drvdata(spi, ili);
517 ili->reset_gpio = reset;
518 /*
519 * Every new incarnation of this display must have a unique
520 * data entry for the system in this driver.
521 */
522 ili->conf = device_get_match_data(dev);
523 if (!ili->conf) {
524 dev_err(dev, "missing device configuration\n");
525 return -ENODEV;
526 }
527
528 ili->max_spi_speed = ili->conf->max_spi_speed;
529 drm_panel_add(&ili->panel);
530
531 return 0;
532 }
533
ili9341_probe(struct spi_device * spi)534 static int ili9341_probe(struct spi_device *spi)
535 {
536 struct device *dev = &spi->dev;
537 struct gpio_desc *dc;
538 struct gpio_desc *reset;
539
540 reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
541 if (IS_ERR(reset))
542 return dev_err_probe(dev, PTR_ERR(reset), "Failed to get gpio 'reset'\n");
543
544 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
545 if (IS_ERR(dc))
546 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\n");
547
548 return ili9341_dpi_probe(spi, dc, reset);
549 }
550
ili9341_remove(struct spi_device * spi)551 static void ili9341_remove(struct spi_device *spi)
552 {
553 struct ili9341 *ili = spi_get_drvdata(spi);
554
555 ili9341_dpi_power_off(ili);
556 drm_panel_remove(&ili->panel);
557 }
558
559 static const struct of_device_id ili9341_of_match[] = {
560 {
561 .compatible = "st,sf-tc240t-9370-t",
562 .data = &ili9341_stm32f429_disco_data,
563 },
564 { }
565 };
566 MODULE_DEVICE_TABLE(of, ili9341_of_match);
567
568 static const struct spi_device_id ili9341_id[] = {
569 { "sf-tc240t-9370-t", 0 },
570 { }
571 };
572 MODULE_DEVICE_TABLE(spi, ili9341_id);
573
574 static struct spi_driver ili9341_driver = {
575 .probe = ili9341_probe,
576 .remove = ili9341_remove,
577 .id_table = ili9341_id,
578 .driver = {
579 .name = "panel-ilitek-ili9341",
580 .of_match_table = ili9341_of_match,
581 },
582 };
583 module_spi_driver(ili9341_driver);
584
585 MODULE_AUTHOR("Dillon Min <dillon.minfei@gmail.com>");
586 MODULE_DESCRIPTION("ILI9341 LCD panel driver");
587 MODULE_LICENSE("GPL v2");
588