Searched refs:HX83102_SETCLOCK (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-himax-hx83102.c | 40 #define HX83102_SETCLOCK 0xcb macro
126 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x33); in starry_himax83102_j02_init()
162 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in starry_himax83102_j02_init()
224 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x34); in boe_nv110wum_init()
258 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in boe_nv110wum_init()
334 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, in csot_pna957qt1_1_init()
362 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in csot_pna957qt1_1_init()
373 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x03, 0x07, 0x00, 0x10, 0x7b); in csot_pna957qt1_1_init()
429 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x34); in ivo_t109nw41_init()
459 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in ivo_t109nw41_init()
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