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Searched refs:HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h2105 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_0_3_sh_mask.h8552 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_1_0_sh_mask.h10401 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h10338 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h8163 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h10327 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_5_1_sh_mask.h13569 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_5_0_sh_mask.h13590 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h11318 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h9264 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h12005 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h18566 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h10207 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h10755 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h10338 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h8160 #define HUBPREQ1_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK … macro