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Searched refs:HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c48 #ifndef HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK
49 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK 0x10000000L macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h16298 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_0_3_sh_mask.h16728 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_1_0_sh_mask.h27711 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_0_1_sh_mask.h27203 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_2_1_sh_mask.h27731 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h33303 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_5_1_sh_mask.h24516 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_5_0_sh_mask.h24537 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_1_2_sh_mask.h32837 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_1_5_sh_mask.h30703 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_1_6_sh_mask.h33601 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_1_4_sh_mask.h35445 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h31449 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h36871 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h35876 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_4_1_0_sh_mask.h44845 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
H A Ddcn_3_2_0_sh_mask.h27755 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h34943 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK … macro