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Searched refs:HHI_VIID_CLK_DIV (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c54 #define HHI_VIID_CLK_DIV 0x128 /* 0x4a offset in data sheet */ macro
299 regmap_update_bits(priv->hhi, HHI_VIID_CLK_DIV, in meson_venci_cvbs_clock_config()
317 regmap_update_bits(priv->hhi, HHI_VIID_CLK_DIV, in meson_venci_cvbs_clock_config()
321 regmap_update_bits(priv->hhi, HHI_VIID_CLK_DIV, in meson_venci_cvbs_clock_config()
/linux/drivers/clk/meson/
H A Dmeson8b.c40 #define HHI_VIID_CLK_DIV 0x128 macro
1477 .offset = HHI_VIID_CLK_DIV,
1493 .offset = HHI_VIID_CLK_DIV,
1509 .offset = HHI_VIID_CLK_DIV,
1539 .offset = HHI_VIID_CLK_DIV,
1569 .offset = HHI_VIID_CLK_DIV,
1599 .offset = HHI_VIID_CLK_DIV,
1629 .offset = HHI_VIID_CLK_DIV,
1777 .offset = HHI_VIID_CLK_DIV,
1808 .offset = HHI_VIID_CLK_DIV,
H A Daxg.c56 #define HHI_VIID_CLK_DIV 0x128 macro
1424 .offset = HHI_VIID_CLK_DIV,
1455 .offset = HHI_VIID_CLK_DIV,
1758 .offset = HHI_VIID_CLK_DIV,
H A Dgxbb.c36 #define HHI_VIID_CLK_DIV 0x128 macro
2021 .offset = HHI_VIID_CLK_DIV,
2052 .offset = HHI_VIID_CLK_DIV,
2387 .offset = HHI_VIID_CLK_DIV,