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Searched refs:HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/hdp/
H A Dhdp_4_0_sh_mask.h524 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10 macro
H A Dhdp_6_0_0_sh_mask.h578 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT … macro
H A Dhdp_5_0_0_sh_mask.h579 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT … macro
H A Dhdp_4_4_2_sh_mask.h579 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT … macro
H A Dhdp_5_2_1_sh_mask.h600 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT … macro
H A Dhdp_7_0_0_sh_mask.h692 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_1_0_sh_mask.h407 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x00000010 macro
H A Doss_2_0_sh_mask.h2444 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10 macro
H A Doss_2_4_sh_mask.h2512 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10 macro
H A Doss_3_0_1_sh_mask.h3526 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10 macro
H A Doss_3_0_sh_mask.h3628 #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10 macro