Searched refs:HDMI_NUM_TX_CHANNEL (Results 1 – 2 of 2) sorted by relevance
27 #define HDMI_NUM_TX_CHANNEL 4 macro36 void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];42 u32 tx_lx_lane_mode[HDMI_NUM_TX_CHANNEL];43 u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];63 u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];64 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];65 u32 tx_lx_vmode_ctrl1[HDMI_NUM_TX_CHANNEL];66 u32 tx_lx_vmode_ctrl2[HDMI_NUM_TX_CHANNEL];67 u32 tx_lx_res_code_lane_tx[HDMI_NUM_TX_CHANNEL];68 u32 tx_lx_hp_pd_enables[HDMI_NUM_TX_CHANNEL];[all …]
28 #define HDMI_NUM_TX_CHANNEL 4 macro38 void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];62 u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];63 u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];64 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];65 u32 tx_lx_pre_driver_1[HDMI_NUM_TX_CHANNEL];66 u32 tx_lx_pre_driver_2[HDMI_NUM_TX_CHANNEL];67 u32 tx_lx_res_code_offset[HDMI_NUM_TX_CHANNEL];352 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) in pll_calculate()467 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in hdmi_8998_pll_set_clk_rate()[all …]