Searched refs:HDMI_CON6 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-hdmi-mt2701.c | 33 #define HDMI_CON6 0x18 macro
56 mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN); in mtk_hdmi_pll_prepare()
57 mtk_phy_set_bits(base + HDMI_CON6, RG_HTPLL_POSDIV_MASK); in mtk_hdmi_pll_prepare()
60 mtk_phy_set_bits(base + HDMI_CON6, RG_HTPLL_EN); in mtk_hdmi_pll_prepare()
84 mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_EN); in mtk_hdmi_pll_unprepare()
87 mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_POSDIV_MASK); in mtk_hdmi_pll_unprepare()
88 mtk_phy_clear_bits(base + HDMI_CON6, RG_HTPLL_RLH_EN); in mtk_hdmi_pll_unprepare()
113 mtk_phy_set_bits(base + HDMI_CON6, RG_HTPLL_PREDIV_MASK); in mtk_hdmi_pll_set_rate()
114 mtk_phy_set_bits(base + HDMI_CON6, RG_HTPLL_POSDIV_MASK); in mtk_hdmi_pll_set_rate()
116 mtk_phy_update_field(base + HDMI_CON6, RG_HTPLL_IC_MASK, 0x1); in mtk_hdmi_pll_set_rate()
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| H A D | phy-mtk-hdmi-mt8173.c | 69 #define HDMI_CON6 0x18 macro
197 mtk_phy_update_bits(base + HDMI_CON6, in mtk_hdmi_pll_set_rate()
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