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Searched refs:HDMI_CON1 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/phy/mediatek/
H A Dphy-mtk-hdmi-mt8173.c22 #define HDMI_CON1 0x04 macro
92 mtk_phy_set_bits(base + HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); in mtk_hdmi_pll_prepare()
95 mtk_phy_set_bits(base + HDMI_CON1, RG_HDMITX_PLL_BIAS_EN); in mtk_hdmi_pll_prepare()
99 mtk_phy_set_bits(base + HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); in mtk_hdmi_pll_prepare()
100 mtk_phy_set_bits(base + HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); in mtk_hdmi_pll_prepare()
110 mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); in mtk_hdmi_pll_unprepare()
111 mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); in mtk_hdmi_pll_unprepare()
115 mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PLL_BIAS_EN); in mtk_hdmi_pll_unprepare()
117 mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); in mtk_hdmi_pll_unprepare()
166 mtk_phy_update_field(base + HDMI_CON1, RG_HDMITX_PLL_TXDIV, div); in mtk_hdmi_pll_set_rate()
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H A Dphy-mtk-hdmi-mt2701.c18 #define HDMI_CON1 0x04 macro
126 mtk_phy_clear_bits(base + HDMI_CON1, RG_HDMITX_PRED_IMP); in mtk_hdmi_pll_set_rate()
127 mtk_phy_update_field(base + HDMI_CON1, RG_HDMITX_PRED_IBIAS_MASK, 0x3); in mtk_hdmi_pll_set_rate()
129 mtk_phy_update_field(base + HDMI_CON1, RG_HDMITX_DRV_IMP_MASK, 0x28); in mtk_hdmi_pll_set_rate()