Searched refs:HDMI_CON0 (Results 1 – 1 of 1) sorted by relevance
10 #define HDMI_CON0 0x00 macro62 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK); in mtk_hdmi_pll_prepare()65 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK); in mtk_hdmi_pll_prepare()66 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK); in mtk_hdmi_pll_prepare()67 mtk_phy_set_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK); in mtk_hdmi_pll_prepare()77 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_DRV_MASK); in mtk_hdmi_pll_unprepare()78 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_PRED_MASK); in mtk_hdmi_pll_unprepare()79 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SER_MASK); in mtk_hdmi_pll_unprepare()82 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_SLDO_MASK); in mtk_hdmi_pll_unprepare()122 mtk_phy_clear_bits(base + HDMI_CON0, RG_HDMITX_EN_IMP_MASK); in mtk_hdmi_pll_set_rate()[all …]