Searched refs:HDMI_1_CFG_9 (Results 1 – 2 of 2) sorted by relevance
65 #define HDMI_1_CFG_9 0x24 macro
98 mtk_phy_update_field(regs + HDMI_1_CFG_9, RG_HDMITX21_SLDO_VREF_SEL, 0x2); in mtk_hdmi_pll_set_hw()