Searched refs:HDMI_1_CFG_6 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-hdmi-mt8195.c | 103 mtk_phy_update_field(regs + HDMI_1_CFG_6, RG_HDMITX21_INTR_CAL, 0x11); in mtk_hdmi_pll_set_hw()
109 mtk_phy_update_field(regs + HDMI_1_CFG_6, RG_HDMITX21_TX_POSDIV, txposdiv_value); in mtk_hdmi_pll_set_hw()
110 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_TX_POSDIV_EN); in mtk_hdmi_pll_set_hw()
111 mtk_phy_clear_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_FRL_EN); in mtk_hdmi_pll_set_hw()
364 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_TX_POSDIV_EN); in mtk_hdmi_pll_prepare()
367 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_D0_DRV_OP_EN); in mtk_hdmi_pll_prepare()
368 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_D1_DRV_OP_EN); in mtk_hdmi_pll_prepare()
369 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_D2_DRV_OP_EN); in mtk_hdmi_pll_prepare()
370 mtk_phy_set_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_CK_DRV_OP_EN); in mtk_hdmi_pll_prepare()
372 mtk_phy_clear_bits(regs + HDMI_1_CFG_6, RG_HDMITX21_FRL_D0_E in mtk_hdmi_pll_prepare()
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| H A D | phy-mtk-hdmi-mt8195.h | 50 #define HDMI_1_CFG_6 0x18 macro
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