Searched refs:HDMI20_CLK_CFG (Results 1 – 2 of 2) sorted by relevance
18 #define HDMI20_CLK_CFG 0x70 macro
39 mtk_phy_update_field(regs + HDMI20_CLK_CFG, REG_TXC_DIV, 3); in mtk_phy_tmds_clk_ratio() 41 mtk_phy_clear_bits(regs + HDMI20_CLK_CFG, REG_TXC_DIV);