Searched refs:HB_DDR_ECC_C_ERR_STAT (Results 1 – 1 of 1) sorted by relevance
28 #define HB_DDR_ECC_C_ERR_STAT 0x1c macro72 u32 syndrome = readl(drvdata->mc_err_base + HB_DDR_ECC_C_ERR_STAT); in highbank_mc_err_handler()