| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 127 unsigned int HActive[],
173 unsigned int HActive[],
218 unsigned int HActive,
258 unsigned int HActive,
294 unsigned int HActive,
316 unsigned int HActive,
324 unsigned int HActive,
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| H A D | display_mode_vba_util_32.c | 438 unsigned int HActive[], in dml32_CalculateSwathAndDETConfiguration()
501 HActive, in dml32_CalculateSwathAndDETConfiguration()
705 unsigned int HActive[], in dml32_CalculateSwathWidth()
754 dml_round(HActive[k] / 4.0 * HRatio[k])); in dml32_CalculateSwathWidth()
757 dml_round(HActive[k] / 2.0 * HRatio[k])); in dml32_CalculateSwathWidth()
766 dml_print("DML::%s: k=%d HActive=%d\n", __func__, k, HActive[k]); in dml32_CalculateSwathWidth()
1183 unsigned int HActive, in dml32_CalculateODMMode() argument
1232 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1244 (DSCEnable && (HActive > MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1259 if (OutFormat == dm_420 && HActive > DCN32_MAX_FMT_420_BUFFER_WIDTH && in dml32_CalculateODMMode()
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| H A D | display_mode_vba_32.c | 191 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
271 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
367 mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
778 …eepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.HActive = mode_lib->vba.HActive[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1999 mode_lib->vba.HActive, in dml32_ModeSupportAndSystemConfigurationFull()
2043 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2066 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2096 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2422 mode_lib->vba.HActive[k], mode_lib->vba.AudioSampleRate[k], in dml32_ModeSupportAndSystemConfigurationFull()
2493 if (mode_lib->vba.HActive[k] in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 83 dml_uint_t HActive,
106 dml_uint_t HActive,
378 dml_uint_t HActive,
449 dml_uint_t HActive,
604 dml_uint_t HActive[],
739 dml_uint_t HActive,
1124 …1to2 || p->myPipe->ODMMode == dml_odm_mode_mso_1to2) ? (dml_float_t)p->myPipe->HActive / 2.0 : 0) + in CalculatePrefetchSchedule()
1125 …((p->myPipe->ODMMode == dml_odm_mode_mso_1to4) ? (dml_float_t)p->myPipe->HActive * 3.0 / 4.0 : 0),… in CalculatePrefetchSchedule()
2710 dml_uint_t HActive, in TruncToValidBPP() argument
4135 p->HActive, in CalculateSwathAndDETConfiguration()
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| H A D | display_mode_core_structs.h | 468 dml_uint_t HActive; member
610 dml_uint_t HActive[__DML_NUM_PLANES__]; member
1501 dml_uint_t *HActive; member
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| H A D | display_mode_util.c | 532 dml_print("DML: timing_cfg: plane=%d, HActive = %d\n", i, timing->HActive[i]); in dml_print_dml_display_cfg_timing()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 505 int HActive[],
538 unsigned int HActive[],
1959 v->HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2034 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2042 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2050 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2938 mode_lib->vba.HActive, in DisplayPipeConfiguration()
3279 long HActive, in TruncToValidBPP() argument
3670 v->HActive, in dml30_ModeSupportAndSystemConfigurationFull()
3728 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 1270 unsigned int HActive, in TruncToValidBPP() argument
3951 static enum dml2_odm_mode DecideODMMode(unsigned int HActive, in DecideODMMode() argument
3976 (HActive <= 1 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_bypass : in DecideODMMode()
3977 (HActive <= 2 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_2to1 : in DecideODMMode()
3978 …(HActive <= 3 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combi… in DecideODMMode()
3985 (HActive <= 1 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_bypass : in DecideODMMode()
3986 (HActive <= 2 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_2to1 : in DecideODMMode()
3987 …(HActive <= 3 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combin… in DecideODMMode()
4048 unsigned int HActive, in ValidateODMMode() argument
4074 if (HActive % (NumberOfDPPRequired * pixels_per_clock_cycle)) in ValidateODMMode()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 116 unsigned int HActive; member
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| H A D | display_mode_vba.h | 496 unsigned int HActive[DC__NUM_DPP__MAX]; member
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| H A D | display_mode_vba.c | 617 mode_lib->vba.HActive[mode_lib->vba.NumberOfActivePlanes] = dst->hactive; in fetch_pipe_params()
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