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Searched refs:H1 (Results 1 – 15 of 15) sorted by relevance

/linux/arch/arm/crypto/
H A Dpoly1305-armv4.pl496 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14));
800 vld4.32 {$H0#lo[0],$H1#lo[0],$H2#lo[0],$H3#lo[0]},[$inp]!
808 vrev32.8 $H1,$H1
819 vsri.u32 $H2#lo,$H1#lo,#20
820 vshl.u32 $H1#lo,$H1#lo,#6
823 vsri.u32 $H1#lo,$H0#lo,#26
827 vbic.i32 $H1#lo,#0xfc000000
831 vadd.i32 $H1#hi,$H1#lo,$D1#lo
846 vld4.32 {$H0#lo,$H1#lo,$H2#lo,$H3#lo},[$inp] @ inp[0:1]
848 vld4.32 {$H0#hi,$H1#hi,$H2#hi,$H3#hi},[$in2] @ inp[2:3] (or 0)
[all …]
/linux/arch/x86/crypto/
H A Dpoly1305-x86_64-cryptogams.pl419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
713 vmovd %rdx#d,$H1
815 vmovd %rdx#d,$H1
845 vmovd 4*1($ctx),$H1
989 vmovdqa $H1,0x10(%r11) #
990 vpmuludq $T3,$H2,$H1 # h3*r1
992 vpaddq $H1,$D4,$D4 # d4 += h3*r1
995 vpmuludq $T1,$H2,$H1 # h1*r1
998 vpaddq $H1,$D2,$D2 # d2 += h1*r1
1006 vpmuludq $T1,$H3,$H1 # h1*r2
[all …]
/linux/arch/arm64/crypto/
H A Dpoly1305-armv8.pl266 my ($H0,$H1,$H2,$H3,$H4) = map("v$_.2s",(24..28));
436 fmov ${H1},x11
466 fmov ${H1},x11
651 add $IN01_1,$IN01_1,$H1
717 xtn $H1,$ACC1
726 bic $H1,#0xfc,lsl#24
735 add $H1,$H1,$T0.2s // h0 -> h1
753 add $IN23_1,$IN01_1,$H1
803 add $IN01_1,$IN01_1,$H1
/linux/drivers/gpu/drm/xe/
H A Dxe_step_types.h53 func(H1) \
/linux/drivers/gpu/drm/i915/
H A Dintel_step.h54 func(H1) \
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp-ec-h1.dtsi3 * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda_sk.dts104 pins = "H0", "H1", "H2";
/linux/Documentation/ABI/testing/
H A Ddebugfs-wilco-ec6 tests, we need to ensure that the H1 chip is properly setting
/linux/drivers/pmdomain/renesas/
H A DKconfig23 bool "System Controller support for R-Car H1" if COMPILE_TEST
/linux/drivers/clk/renesas/
H A DKconfig107 bool "R-Car H1 clock support" if COMPILE_TEST
/linux/drivers/pinctrl/renesas/
H A DKconfig100 bool "pin control support for R-Car H1" if COMPILE_TEST
/linux/drivers/char/tpm/
H A DKconfig88 If you have a H1 secure module running Cr50 firmware on SPI bus,
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c1104 #define H1 135 macro
1105 SIG_EXPR_LIST_DECL_SINGLE(H1, USB11HDN3, USB11H3, USB11H3_DESC);
1106 PIN_DECL_1(H1, GPIOQ7, USB11HDN3);
2030 ASPEED_PINCTRL_PIN(H1),
/linux/drivers/iio/pressure/
H A Dbmp280-core.c376 calib->H1 = tmp; in bme280_read_calib()
439 var -= ((((var >> 15) * (var >> 15)) >> 7) * (s32)calib->H1) >> 4; in bme280_compensate_humidity()
/linux/Documentation/driver-api/
H A Dpin-control.rst71 PINCTRL_PIN(63, "H1"),
444 On the bottom row at { A1, B1, C1, D1, E1, F1, G1, H1 } we have something