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Searched refs:GRPH_ARRAY_MODE (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsi_enums.h93 #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) macro
102 #define GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) macro
H A Ddce_v6_0.c1966 fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_2D_TILED_THIN1); in dce_v6_0_crtc_do_set_base()
1972 fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_1D_TILED_THIN1); in dce_v6_0_crtc_do_set_base()
H A Ddce_v10_0.c1996 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v10_0_crtc_do_set_base()
2007 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v10_0_crtc_do_set_base()
H A Ddce_v11_0.c2046 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v11_0_crtc_do_set_base()
2057 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v11_0_crtc_do_set_base()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_mem_input.h165 SFB(blk, GRPH_CONTROL, GRPH_ARRAY_MODE, mask_sh),\
177 SFB(blk, GRPH_CONTROL, GRPH_ARRAY_MODE, mask_sh),\
367 type GRPH_ARRAY_MODE;\
H A Ddce_mem_input.c458 GRPH_ARRAY_MODE, info->gfx8.array_mode, in program_tiling()
466 if (dce_mi->masks->GRPH_ARRAY_MODE) { /* GFX6 but reuses gfx8 struct */ in program_tiling()
475 GRPH_ARRAY_MODE, info->gfx8.array_mode, in program_tiling()