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Searched refs:GRA05__GRPH_READ1__SHIFT (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7222 #define GRA05__GRPH_READ1__SHIFT 0x00000003 macro
H A Ddce_8_0_sh_mask.h10848 #define GRA05__GRPH_READ1__SHIFT 0x3 macro
H A Ddce_11_0_sh_mask.h11044 #define GRA05__GRPH_READ1__SHIFT 0x3 macro
H A Ddce_10_0_sh_mask.h11232 #define GRA05__GRPH_READ1__SHIFT 0x3 macro
H A Ddce_11_2_sh_mask.h12298 #define GRA05__GRPH_READ1__SHIFT 0x3 macro
H A Ddce_12_0_sh_mask.h64686 #define GRA05__GRPH_READ1__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27441 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_1_0_sh_mask.h46347 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h45434 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h48669 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h48711 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h52853 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h51924 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h54656 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h342 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h54506 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h59958 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h63102 #define GRA05__GRPH_READ1__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h48710 #define GRA05__GRPH_READ1__SHIFT … macro