Searched refs:GICV5_IRS_SPI_STATUSR (Results 1 – 2 of 2) sorted by relevance
80 #define GICV5_IRS_SPI_STATUSR 0x0118 macro
410 ret = gicv5_wait_for_op_atomic(irs_data->irs_base, GICV5_IRS_SPI_STATUSR, in gicv5_irs_wait_for_spi_op()