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Searched refs:GICD_CTLR (Results 1 – 3 of 3) sorted by relevance

/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dgic_v3.c47 while (readl(GICD_BASE_GVA + GICD_CTLR) & GICD_CTLR_RWP) { in gicv3_gicd_wait_for_rwp()
361 writel(0, GICD_BASE_GVA + GICD_CTLR); in gicv3_dist_init()
384 GICD_CTLR_ENABLE_G1, GICD_BASE_GVA + GICD_CTLR); in gicv3_dist_init()
/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c88 case GICD_CTLR: in vgic_mmio_read_v3_misc()
128 case GICD_CTLR: { in vgic_mmio_write_v3_misc()
206 case GICD_CTLR: in vgic_mmio_uaccess_write_v3_misc()
627 REGISTER_DESC_WITH_LENGTH_UACCESS(GICD_CTLR,
/linux/include/linux/irqchip/
H A Darm-gic-v3.h13 #define GICD_CTLR 0x0000 macro
114 #define GICR_CTLR GICD_CTLR