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Searched refs:GC_EDC_CTRL__EDC_SW_RST_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c696 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
711 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13299 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_1_sh_mask.h14602 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_2_1_sh_mask.h14456 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_9_4_2_sh_mask.h6724 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_11_5_0_sh_mask.h21465 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_11_0_0_sh_mask.h25402 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_12_0_0_sh_mask.h7848 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_10_1_0_sh_mask.h20783 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_11_0_3_sh_mask.h27917 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro
H A Dgc_10_3_0_sh_mask.h18872 #define GC_EDC_CTRL__EDC_SW_RST_MASK … macro