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Searched refs:GCC_MMSS_GPLL0_DIV_CLK (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdm660.h71 #define GCC_MMSS_GPLL0_DIV_CLK 61 macro
H A Dqcom,gcc-msm8998.h193 #define GCC_MMSS_GPLL0_DIV_CLK 184 macro
H A Dqcom,gcc-msm8996.h237 #define GCC_MMSS_GPLL0_DIV_CLK 228 macro
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm660.dtsi241 <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
H A Dsdm630.dtsi1550 <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
/linux/drivers/clk/qcom/
H A Dgcc-sdm660.c2414 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,
H A Dgcc-msm8998.c3190 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,
H A Dgcc-msm8996.c3458 [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr,