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Searched refs:GCC_BLSP1_QUP3_BCR (Results 1 – 25 of 25) sorted by relevance

/linux/include/dt-bindings/reset/
H A Dqcom,gcc-msm8974.h30 #define GCC_BLSP1_QUP3_BCR 21 macro
H A Dqcom,gcc-msm8916.h14 #define GCC_BLSP1_QUP3_BCR 5 macro
H A Dqcom,gcc-apq8084.h30 #define GCC_BLSP1_QUP3_BCR 21 macro
H A Dqcom,gcc-msm8939.h14 #define GCC_BLSP1_QUP3_BCR 5 macro
H A Dqcom,gcc-ipq5018.h13 #define GCC_BLSP1_QUP3_BCR 4 macro
H A Dqcom,gcc-ipq6018.h14 #define GCC_BLSP1_QUP3_BCR 5 macro
H A Dqcom,ipq9574-gcc.h14 #define GCC_BLSP1_QUP3_BCR 5 macro
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdx65.h95 #define GCC_BLSP1_QUP3_BCR 2 macro
H A Dqcom,gcc-msm8909.h170 #define GCC_BLSP1_QUP3_BCR 4 macro
H A Dqcom,gcc-msm8998.h208 #define GCC_BLSP1_QUP3_BCR 2 macro
H A Dqcom,ipq5332-gcc.h178 #define GCC_BLSP1_QUP3_BCR 15 macro
H A Dqcom,gcc-msm8996.h261 #define GCC_BLSP1_QUP3_BCR 21 macro
H A Dqcom,gcc-ipq8074.h243 #define GCC_BLSP1_QUP3_BCR 5 macro
/linux/drivers/clk/qcom/
H A Dgcc-sdx65.c1518 [GCC_BLSP1_QUP3_BCR] = { 0x20000 },
H A Dgcc-msm8909.c2638 [GCC_BLSP1_QUP3_BCR] = { 0x04018 },
H A Dgcc-msm8974.c2761 [GCC_BLSP1_QUP3_BCR] = { 0x0740 },
H A Dgcc-msm8998.c3209 [GCC_BLSP1_QUP3_BCR] = { 0x1d000 },
H A Dgcc-ipq5332.c3083 [GCC_BLSP1_QUP3_BCR] = { 0x4000 },
H A Dgcc-msm8916.c3318 [GCC_BLSP1_QUP3_BCR] = { 0x04018 },
H A Dgcc-apq8084.c3527 [GCC_BLSP1_QUP3_BCR] = { 0x0740 },
H A Dgcc-ipq5018.c3556 [GCC_BLSP1_QUP3_BCR] = { 0x04008, 0 },
H A Dgcc-msm8996.c3498 [GCC_BLSP1_QUP3_BCR] = { 0x1d000 },
H A Dgcc-msm8939.c3979 [GCC_BLSP1_QUP3_BCR] = { 0x04018 },
H A Dgcc-ipq9574.c3911 [GCC_BLSP1_QUP3_BCR] = { 0x04000, 0 },
H A Dgcc-ipq8074.c4574 [GCC_BLSP1_QUP3_BCR] = { 0x04008, 0 },