| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt2701-eth.c | 19 #define GATE_ETH(_id, _name, _parent, _shift) \ macro
24 GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
25 GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
26 GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
27 GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
28 GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11),
29 GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14),
30 GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17),
31 GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),
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| H A D | clk-mt7622-eth.c | 17 #define GATE_ETH(_id, _name, _parent, _shift) \ macro
27 GATE_ETH(CLK_ETH_HSDMA_EN, "eth_hsdma_en", "eth_sel", 5),
28 GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 6),
29 GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7),
30 GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8),
31 GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9),
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| H A D | clk-mt7986-eth.c | 55 #define GATE_ETH(_id, _name, _parent, _shift) \ macro
59 GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "netsys_2x_sel", 6),
60 GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "sgm_325m_sel", 7),
61 GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "sgm_325m_sel", 8),
62 GATE_ETH(CLK_ETH_WOCPU1_EN, "eth_wocpu1_en", "netsys_mcu_sel", 14),
63 GATE_ETH(CLK_ETH_WOCPU0_EN, "eth_wocpu0_en", "netsys_mcu_sel", 15),
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| H A D | clk-mt7629-eth.c | 17 #define GATE_ETH(_id, _name, _parent, _shift) \ macro
27 GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "eth2pll", 6),
28 GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7),
29 GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8),
30 GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9),
31 GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 16),
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| H A D | clk-mt7981-eth.c | 69 #define GATE_ETH(_id, _name, _parent, _shift) { \ macro
79 GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "netsys_2x", 6),
80 GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "sgm_325m", 7),
81 GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "sgm_325m", 8),
82 GATE_ETH(CLK_ETH_WOCPU0_EN, "eth_wocpu0_en", "netsys_wed_mcu", 15),
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