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Searched refs:FLD_VAL (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/bridge/
H A Dtc358764.c24 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
48 #define VP_CTRL_VSDELAY(v) FLD_VAL(v, 31, 20) /* VSYNC delay */
53 #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16)
54 #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0)
56 #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16)
57 #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0)
59 #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16)
60 #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0)
62 #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16)
63 #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0)
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_wp.c139 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format()
140 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format()
170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
177 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
H A Ddss.h60 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
63 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_wp.c138 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format()
139 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format()
181 timing_h |= FLD_VAL(vm->hback_porch, 31, 20); in hdmi_wp_video_config_timing()
182 timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); in hdmi_wp_video_config_timing()
183 timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); in hdmi_wp_video_config_timing()
186 timing_v |= FLD_VAL(vm->vback_porch, 31, 20); in hdmi_wp_video_config_timing()
187 timing_v |= FLD_VAL(vm->vfront_porch, 19, 8); in hdmi_wp_video_config_timing()
188 timing_v |= FLD_VAL(vm->vsync_len, 7, 0); in hdmi_wp_video_config_timing()
H A Ddispc.c792 h = FLD_VAL(h_coef[i].hc0_vc00, 7, 0) in dispc_ovl_set_scale_coef()
793 | FLD_VAL(h_coef[i].hc1_vc0, 15, 8) in dispc_ovl_set_scale_coef()
794 | FLD_VAL(h_coef[i].hc2_vc1, 23, 16) in dispc_ovl_set_scale_coef()
795 | FLD_VAL(h_coef[i].hc3_vc2, 31, 24); in dispc_ovl_set_scale_coef()
796 hv = FLD_VAL(h_coef[i].hc4_vc22, 7, 0) in dispc_ovl_set_scale_coef()
797 | FLD_VAL(v_coef[i].hc1_vc0, 15, 8) in dispc_ovl_set_scale_coef()
798 | FLD_VAL(v_coef[i].hc2_vc1, 23, 16) in dispc_ovl_set_scale_coef()
799 | FLD_VAL(v_coef[i].hc3_vc2, 31, 24); in dispc_ovl_set_scale_coef()
814 v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) in dispc_ovl_set_scale_coef()
815 | FLD_VAL(v_coef[i].hc4_vc22, 15, 8); in dispc_ovl_set_scale_coef()
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