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Searched refs:FIXED_CLK (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c240 FIXED_CLK(CLK_TOP_TO_U2_PHY, "to_u2_phy", "clkxtal",
242 FIXED_CLK(CLK_TOP_TO_U2_PHY_1P, "to_u2_phy_1p", "clkxtal",
244 FIXED_CLK(CLK_TOP_PCIE0_PIPE_EN, "pcie0_pipe_en", "clkxtal",
246 FIXED_CLK(CLK_TOP_PCIE1_PIPE_EN, "pcie1_pipe_en", "clkxtal",
248 FIXED_CLK(CLK_TOP_SSUSB_TX250M, "ssusb_tx250m", "clkxtal",
250 FIXED_CLK(CLK_TOP_SSUSB_EQ_RX250M, "ssusb_eq_rx250m", "clkxtal",
252 FIXED_CLK(CLK_TOP_SSUSB_CDR_REF, "ssusb_cdr_ref", "clkxtal",
254 FIXED_CLK(CLK_TOP_SSUSB_CDR_FB, "ssusb_cdr_fb", "clkxtal",
256 FIXED_CLK(CLK_TOP_SATA_ASIC, "sata_asic", "clkxtal",
258 FIXED_CLK(CLK_TOP_SATA_RBC, "sata_rbc", "clkxtal",
H A Dclk-mt2712.c21 FIXED_CLK(CLK_TOP_VPLL3_DPIX, "vpll3_dpix", NULL, 200000000),
22 FIXED_CLK(CLK_TOP_VPLL_DPIX, "vpll_dpix", NULL, 200000000),
23 FIXED_CLK(CLK_TOP_LTEPLL_FS26M, "ltepll_fs26m", NULL, 26000000),
24 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", NULL, 350000000),
25 FIXED_CLK(CLK_TOP_DSI0_LNTC, "dsi0_lntc", NULL, 143000000),
26 FIXED_CLK(CLK_TOP_DSI1_LNTC, "dsi1_lntc", NULL, 143000000),
27 FIXED_CLK(CLK_TOP_LVDSTX3_CLKDIG_CTS, "lvdstx3", NULL, 140000000),
28 FIXED_CLK(CLK_TOP_LVDSTX_CLKDIG_CTS, "lvdstx", NULL, 140000000),
29 FIXED_CLK(CLK_TOP_CLKRTC_EXT, "clkrtc_ext", NULL, 32768),
30 FIXED_CLK(CLK_TOP_CLKRTC_INT, "clkrtc_int", NULL, 32747),
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H A Dclk-mt2701.c27 FIXED_CLK(CLK_TOP_DPI, "dpi_ck", "clk26m",
29 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", "clk26m",
31 FIXED_CLK(CLK_TOP_VENCPLL, "vencpll_ck", "clk26m",
33 FIXED_CLK(CLK_TOP_HDMI_0_PIX340M, "hdmi_0_pix340m", "clk26m",
35 FIXED_CLK(CLK_TOP_HDMI_0_DEEP340M, "hdmi_0_deep340m", "clk26m",
37 FIXED_CLK(CLK_TOP_HDMI_0_PLL340M, "hdmi_0_pll340m", "clk26m",
39 FIXED_CLK(CLK_TOP_HADDS2_FB, "hadds2_fbclk", "clk26m",
41 FIXED_CLK(CLK_TOP_WBG_DIG_416M, "wbg_dig_ck_416m", "clk26m",
43 FIXED_CLK(CLK_TOP_DSI0_LNTC_DSI, "dsi0_lntc_dsi", "clk26m",
45 FIXED_CLK(CLK_TOP_HDMI_SCL_RX, "hdmi_scl_rx", "clk26m",
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H A Dclk-mt8173-topckgen.c424 FIXED_CLK(CLK_DUMMY, "topck_dummy", "clk26m", DUMMY_RATE),
425 FIXED_CLK(CLK_TOP_CLKPH_MCK_O, "clkph_mck_o", "clk26m", DUMMY_RATE),
426 FIXED_CLK(CLK_TOP_USB_SYSPLL_125M, "usb_syspll_125m", "clk26m", 125 * MHZ),
427 FIXED_CLK(CLK_TOP_DSI0_DIG, "dsi0_dig", "clk26m", DUMMY_RATE),
428 FIXED_CLK(CLK_TOP_DSI1_DIG, "dsi1_dig", "clk26m", DUMMY_RATE),
429 FIXED_CLK(CLK_TOP_LVDS_PXL, "lvds_pxl", "lvdspll", DUMMY_RATE),
430 FIXED_CLK(CLK_TOP_LVDS_CTS, "lvds_cts", "lvdspll", DUMMY_RATE),
H A Dclk-mt8195-topckgen.c16 FIXED_CLK(CLK_TOP_IN_DGI, "in_dgi", NULL, 165000000),
17 FIXED_CLK(CLK_TOP_ULPOSC1, "ulposc1", NULL, 248000000),
18 FIXED_CLK(CLK_TOP_ULPOSC2, "ulposc2", NULL, 326000000),
19 FIXED_CLK(CLK_TOP_MEM_466M, "mem_466m", NULL, 533000000),
20 FIXED_CLK(CLK_TOP_MPHONE_SLAVE_B, "mphone_slave_b", NULL, 49152000),
21 FIXED_CLK(CLK_TOP_PEXTP_PIPE, "pextp_pipe", NULL, 250000000),
22 FIXED_CLK(CLK_TOP_UFS_RX_SYMBOL, "ufs_rx_symbol", NULL, 166000000),
23 FIXED_CLK(CLK_TOP_UFS_TX_SYMBOL, "ufs_tx_symbol", NULL, 166000000),
24 FIXED_CLK(CLK_TOP_SSUSB_U3PHY_P1_P_P0, "ssusb_u3phy_p1_p_p0", NULL, 131000000),
25 FIXED_CLK(CLK_TOP_UFS_RX_SYMBOL1, "ufs_rx_symbol1", NULL, 166000000),
[all …]
H A Dclk-mt6735-topckgen.c49 FIXED_CLK(CLK_TOP_AD_SYS_26M_CK, "ad_sys_26m_ck", "clk26m", 26 * MHZ),
55 FIXED_CLK(CLK_TOP_CLKPH_MCK_O, "clkph_mck_o", NULL, 0),
59 FIXED_CLK(CLK_TOP_DMPLL, "dmpll", "clkph_mck_o", 0),
63 FIXED_CLK(CLK_TOP_DPI_CK, "dpi_ck", NULL, 0),
68 FIXED_CLK(CLK_TOP_WHPLL_AUDIO_CK, "whpll_audio_ck", NULL, 0)
H A Dclk-mt6795-topckgen.c351 FIXED_CLK(CLK_TOP_ADSYS_26M, "adsys_26m", "clk26m", 26 * MHZ),
352 FIXED_CLK(CLK_TOP_CLKPH_MCK_O, "clkph_mck_o", "clk26m", DUMMY_RATE),
353 FIXED_CLK(CLK_TOP_USB_SYSPLL_125M, "usb_syspll_125m", "clk26m", 125 * MHZ),
354 FIXED_CLK(CLK_TOP_DSI0_DIG, "dsi0_dig", "clk26m", DUMMY_RATE),
355 FIXED_CLK(CLK_TOP_DSI1_DIG, "dsi1_dig", "clk26m", DUMMY_RATE),
H A Dclk-mt8167.c24 FIXED_CLK(CLK_TOP_CLK_NULL, "clk_null", NULL, 0),
25 FIXED_CLK(CLK_TOP_I2S_INFRA_BCK, "i2s_infra_bck", "clk_null", 26000000),
26 FIXED_CLK(CLK_TOP_MEMPLL, "mempll", "clk26m", 800000000),
27 FIXED_CLK(CLK_TOP_DSI0_LNTC_DSICK, "dsi0_lntc_dsick", "clk26m", 75000000),
28 FIXED_CLK(CLK_TOP_VPLL_DPIX, "vpll_dpix", "clk26m", 75000000),
29 FIXED_CLK(CLK_TOP_LVDSTX_CLKDIG_CTS, "lvdstx_dig_cts", "clk26m", 52500000),
H A Dclk-mt8188-topckgen.c17 FIXED_CLK(CLK_TOP_ULPOSC1, "ulposc_ck1", NULL, 260000000),
18 FIXED_CLK(CLK_TOP_MPHONE_SLAVE_BCK, "mphone_slave_bck", NULL, 49152000),
19 FIXED_CLK(CLK_TOP_PAD_FPC, "pad_fpc_ck", NULL, 50000000),
20 FIXED_CLK(CLK_TOP_466M_FMEM, "hd_466m_fmem_ck", NULL, 533000000),
21 FIXED_CLK(CLK_TOP_PEXTP_PIPE, "pextp_pipe", NULL, 250000000),
22 FIXED_CLK(CLK_TOP_DSI_PHY, "dsi_phy", NULL, 500000000),
H A Dclk-mt8365.c23 FIXED_CLK(CLK_TOP_CLK_NULL, "clk_null", NULL, 0),
24 FIXED_CLK(CLK_TOP_I2S0_BCK, "i2s0_bck", NULL, 26000000),
25 FIXED_CLK(CLK_TOP_DSI0_LNTC_DSICK, "dsi0_lntc_dsick", "clk26m",
27 FIXED_CLK(CLK_TOP_VPLL_DPIX, "vpll_dpix", "clk26m", 75000000),
28 FIXED_CLK(CLK_TOP_LVDSTX_CLKDIG_CTS, "lvdstx_dig_cts", "clk26m",
H A Dclk-mt8186-topckgen.c16 FIXED_CLK(CLK_TOP_ULPOSC1, "ulposc1", NULL, 250000000),
17 FIXED_CLK(CLK_TOP_466M_FMEM, "hd_466m_fmem_ck", NULL, 466000000),
18 FIXED_CLK(CLK_TOP_MPLL, "mpll", NULL, 208000000),
H A Dclk-mt7986-topckgen.c20 FIXED_CLK(CLK_TOP_XTAL, "top_xtal", "clkxtal", 40000000),
21 FIXED_CLK(CLK_TOP_JTAG, "top_jtag", "clkxtal", 50000000),
H A Dclk-mt8183.c20 FIXED_CLK(CLK_TOP_CLK26M, "f_f26m_ck", "clk26m", 26000000),
21 FIXED_CLK(CLK_TOP_ULPOSC, "osc", NULL, 250000),
22 FIXED_CLK(CLK_TOP_UNIVP_192M, "univpll_192m", "univpll", 192000000),
H A Dclk-mt6765.c76 FIXED_CLK(CLK_TOP_F_FRTC, "f_frtc_ck", "clk32k", 32768),
77 FIXED_CLK(CLK_TOP_CLK26M, "clk_26m_ck", "clk26m", 26000000),
78 FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", NULL, 466000000),
H A Dclk-mt7988-topckgen.c21 FIXED_CLK(CLK_TOP_XTAL, "top_xtal", "clkxtal", 40000000),
H A Dclk-mtk.h53 #define FIXED_CLK(_id, _name, _parent, _rate) { \ macro
H A Dclk-mt8192.c22 FIXED_CLK(CLK_TOP_ULPOSC, "ulposc", NULL, 260000000),
/linux/drivers/clk/renesas/
H A Dr8a78000-cpg.c35 #define FIXED_CLK(rate) FIXED_CLK_ ## rate macro
142 { R8A78000_CPG_SGASYNCD4_PERW_BUS, FIXED_CLK(266M) },
143 { R8A78000_CPG_SGASYNCD16_PERW_BUS, FIXED_CLK(66M) },
/linux/drivers/clk/aspeed/
H A Dclk-ast2700.c282 #define FIXED_CLK(_id, _name, _rate) \ macro
366 FIXED_CLK(SCU0_CLKIN, "soc0-clkin", 25 * HZ_PER_MHZ),
367 FIXED_CLK(SCU0_CLK_24M, "soc0-clk24Mhz", 24 * HZ_PER_MHZ),
368 FIXED_CLK(SCU0_CLK_192M, "soc0-clk192Mhz", 192 * HZ_PER_MHZ),
369 FIXED_CLK(SCU0_CLK_U2PHY_CLK12M, "u2phy_clk12m", 12 * HZ_PER_MHZ),
463 FIXED_CLK(SCU1_CLKIN, "soc1-clkin", 25 * HZ_PER_MHZ),