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Searched refs:FIELD_SET (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/soc/qcom/
H A Dspm.c26 #define FIELD_SET(current, mask, val) \ macro
355 vctl = FIELD_SET(vctl, SPM_VCTL_VLVL, vlevel); in smp_set_vdd_v1_1()
356 data0 = FIELD_SET(data0, SPM_PMIC_DATA_0_VLVL, vlevel); in smp_set_vdd_v1_1()
357 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MIN_VSEL, volt_sel); in smp_set_vdd_v1_1()
358 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MAX_VSEL, volt_sel); in smp_set_vdd_v1_1()
376 avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MIN_VLVL, min_avs); in smp_set_vdd_v1_1()
377 avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MAX_VLVL, max_avs); in smp_set_vdd_v1_1()
/linux/drivers/gpu/drm/xe/
H A Dxe_hw_engine.c395 XE_RTP_ACTIONS(FIELD_SET(BLIT_CCTL(0), in xe_hw_engine_setup_default_lrc_state()
404 XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(0), in xe_hw_engine_setup_default_lrc_state()
440 XE_RTP_ACTIONS(FIELD_SET(RING_CMD_CCTL(0), in hw_engine_setup_default_state()
457 FIELD_SET(RING_PWRCTX_MAXCNT(0), in hw_engine_setup_default_state()
471 XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE, in hw_engine_setup_default_state()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drpm.c397 cfg = FIELD_SET(RPM_PFC_CLASS_MASK, 0, cfg); in rpm_lmac_pause_frm_config()
473 req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_LINK_STS, req); in rpm_get_lmac_type()
659 class_en = FIELD_SET(RPM_PFC_CLASS_MASK, pfc_en, class_en); in rpm_lmac_pfc_config()
663 class_en = FIELD_SET(RPM_PFC_CLASS_MASK, 0, class_en); in rpm_lmac_pfc_config()
H A Dcgx_fw_if.h183 #define FIELD_SET(m, y, x) \ macro