Searched refs:FIELD_SET (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/soc/qcom/ |
| H A D | spm.c | 26 #define FIELD_SET(current, mask, val) \ macro 355 vctl = FIELD_SET(vctl, SPM_VCTL_VLVL, vlevel); in smp_set_vdd_v1_1() 356 data0 = FIELD_SET(data0, SPM_PMIC_DATA_0_VLVL, vlevel); in smp_set_vdd_v1_1() 357 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MIN_VSEL, volt_sel); in smp_set_vdd_v1_1() 358 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MAX_VSEL, volt_sel); in smp_set_vdd_v1_1() 376 avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MIN_VLVL, min_avs); in smp_set_vdd_v1_1() 377 avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MAX_VLVL, max_avs); in smp_set_vdd_v1_1()
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| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | cgx.c | 948 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg); in cgx_lmac_pause_frm_config() 1016 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, pfc_en, cfg); in cgx_lmac_pfc_config() 1019 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg); in cgx_lmac_pfc_config() 1098 req = FIELD_SET(CMDREG_OWN, CGX_CMD_OWN_FIRMWARE, req); in cgx_fwi_cmd_send() 1482 req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_FWD_BASE, req); in cgx_get_fwdata_base() 1515 req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req); in cgx_set_link_mode() 1516 req = FIELD_SET(CMDMODECHANGE_SPEED, in cgx_set_link_mode() 1518 req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req); in cgx_set_link_mode() 1519 req = FIELD_SET(CMDMODECHANGE_AN, args.an, req); in cgx_set_link_mode() 1520 req = FIELD_SET(CMDMODECHANGE_MODE_BASEIDX, args.mode_baseidx, req); in cgx_set_link_mode() [all …]
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| H A D | rpm.c | 397 cfg = FIELD_SET(RPM_PFC_CLASS_MASK, 0, cfg); in rpm_lmac_pause_frm_config() 473 req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_LINK_STS, req); in rpm_get_lmac_type() 659 class_en = FIELD_SET(RPM_PFC_CLASS_MASK, pfc_en, class_en); in rpm_lmac_pfc_config() 663 class_en = FIELD_SET(RPM_PFC_CLASS_MASK, 0, class_en); in rpm_lmac_pfc_config()
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| H A D | cgx_fw_if.h | 183 #define FIELD_SET(m, y, x) \ macro
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_wa.c | 403 XE_RTP_ACTIONS(FIELD_SET(LSC_CHICKEN_BIT_0_UDW, 669 XE_RTP_ACTIONS(FIELD_SET(SAMPLER_MODE, SMP_WAIT_FETCH_MERGING_COUNTER, 726 XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(RENDER_RING_BASE), 761 XE_RTP_ACTIONS(FIELD_SET(VF_PREEMPTION,
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