Searched refs:FEATURE_MASK (Results 1 – 10 of 10) sorted by relevance
62 #define FEATURE_MASK(feature) (1ULL << feature) macro64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \65 FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \66 FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \67 FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \68 FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \69 FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))278 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FW_DATA_READ_BIT); in smu_v13_0_7_get_allowed_feature_mask()281 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in smu_v13_0_7_get_allowed_feature_mask()282 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT); in smu_v13_0_7_get_allowed_feature_mask()[all …]
55 #define FEATURE_MASK(feature) (1ULL << feature) macro62 FEATURE_MASK(FEATURE_CCLK_DPM_BIT) | \63 FEATURE_MASK(FEATURE_VCN_DPM_BIT) | \64 FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \65 FEATURE_MASK(FEATURE_SOCCLK_DPM_BIT) | \66 FEATURE_MASK(FEATURE_MP0CLK_DPM_BIT) | \67 FEATURE_MASK(FEATURE_LCLK_DPM_BIT) | \68 FEATURE_MASK(FEATURE_SHUBCLK_DPM_BIT) | \69 FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT) | \70 FEATURE_MASK(FEATURE_ISP_DPM_BIT) | \[all …]
62 #define FEATURE_MASK(feature) (1ULL << feature) macro64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \65 FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \66 FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \67 FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \68 FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \69 FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))310 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in smu_v13_0_0_get_allowed_feature_mask()311 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_GFX_IMU_BIT); in smu_v13_0_0_get_allowed_feature_mask()316 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_ATHUB_MMHUB_PG_BIT); in smu_v13_0_0_get_allowed_feature_mask()[all …]
78 #define FEATURE_MASK(feature) (1ULL << feature) macro80 (FEATURE_MASK(FEATURE_DATA_CALCULATION) | \81 FEATURE_MASK(FEATURE_DPM_GFXCLK) | FEATURE_MASK(FEATURE_DPM_UCLK) | \82 FEATURE_MASK(FEATURE_DPM_SOCCLK) | FEATURE_MASK(FEATURE_DPM_FCLK) | \83 FEATURE_MASK(FEATURE_DPM_LCLK) | FEATURE_MASK(FEATURE_DPM_XGMI) | \84 FEATURE_MASK(FEATURE_DPM_VCN))1447 (feature_mask & FEATURE_MASK(FEATURE_DPM_GFXCLK))) { in smu_v13_0_6_upload_dpm_level()1463 (feature_mask & FEATURE_MASK(FEATURE_DPM_UCLK))) { in smu_v13_0_6_upload_dpm_level()1480 (feature_mask & FEATURE_MASK(FEATURE_DPM_SOCCLK))) { in smu_v13_0_6_upload_dpm_level()1521 smu, false, FEATURE_MASK(FEATURE_DPM_GFXCLK), in smu_v13_0_6_force_clk_levels()[all …]
63 #define FEATURE_MASK(feature) (1ULL << feature) macro65 FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \66 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \67 FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \68 FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \69 FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \70 FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \71 FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) | \72 FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))289 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in sienna_cichlid_get_allowed_feature_mask()[all …]
61 #define FEATURE_MASK(feature) (1ULL << feature) macro63 FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \65 FEATURE_MASK(FEATURE_DPM_GFX_PACE_BIT) | \66 FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \67 FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \68 FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) | \69 FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \70 FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT))288 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in navi10_get_allowed_feature_mask()[all …]
63 #define FEATURE_MASK(feature) (1ULL << feature) macro65 FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \66 FEATURE_MASK(FEATURE_SOC_DPM_BIT) | \67 FEATURE_MASK(FEATURE_GFX_DPM_BIT))
61 #define FEATURE_MASK(feature) (1ULL << feature) macro63 FEATURE_MASK(FEATURE_CCLK_DPM_BIT) | \64 FEATURE_MASK(FEATURE_VCN_DPM_BIT) | \65 FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \66 FEATURE_MASK(FEATURE_SOCCLK_DPM_BIT) | \67 FEATURE_MASK(FEATURE_MP0CLK_DPM_BIT) | \68 FEATURE_MASK(FEATURE_LCLK_DPM_BIT) | \69 FEATURE_MASK(FEATURE_SHUBCLK_DPM_BIT) | \70 FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT)| \71 FEATURE_MASK(FEATURE_GFX_DPM_BIT))
75 #define FEATURE_MASK(feature) (1ULL << feature) macro77 FEATURE_MASK(FEATURE_CCLK_DPM_BIT) | \78 FEATURE_MASK(FEATURE_VCN_DPM_BIT) | \79 FEATURE_MASK(FEATURE_FCLK_DPM_BIT) | \80 FEATURE_MASK(FEATURE_SOCCLK_DPM_BIT) | \81 FEATURE_MASK(FEATURE_LCLK_DPM_BIT) | \82 FEATURE_MASK(FEATURE_SHUBCLK_DPM_BIT) | \83 FEATURE_MASK(FEATURE_DCFCLK_DPM_BIT)| \84 FEATURE_MASK(FEATURE_ISP_DPM_BIT)| \85 FEATURE_MASK(FEATURE_IPU_DPM_BIT) | \[all …]
59 #define FEATURE_MASK(feature) (1ULL << feature) macro61 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \62 FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \63 FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \64 FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \65 FEATURE_MASK(FEATURE_DPM_FCLK_BIT))279 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in smu_v14_0_2_get_allowed_feature_mask()280 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_IMU_BIT); in smu_v14_0_2_get_allowed_feature_mask()285 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_ATHUB_MMHUB_PG_BIT); in smu_v14_0_2_get_allowed_feature_mask()288 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); in smu_v14_0_2_get_allowed_feature_mask()[all …]