Searched refs:EN0_DCFG (Results 1 – 4 of 4) sorted by relevance
191 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
313 {0x49, EN0_DCFG}, in ne2k_pci_init_one()348 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
337 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in get_prom()415 outb_p(0x01, ioaddr + EN0_DCFG); /* Set word-wide access. */ in get_ax88190()
1026 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()