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Searched refs:EDPCSR (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/trace/coresight/
H A Dcoresight-cpu-debug.rst38 sampling registers: EDPCSR, EDVIDSR and EDCIDSR: from EDPCSR we can get
52 If PCSROffset=0b0000, on ARMv8-a the feature of EDPCSR is not implemented;
59 If PCSROffset=0b0010, ARMv8-a defines "EDPCSR implemented, and samples have
62 in AArch32 state, EDPCSR is not sampled; when the CPU operates in AArch64
63 state EDPCSR is sampled and no offset are applied.
186 coresight-cpu-debug 850000.debug: EDPCSR: handle_IPI+0x174/0x1d8
191 coresight-cpu-debug 852000.debug: EDPCSR: debug_notifier_call+0x23c/0x358
/linux/drivers/hwtracing/coresight/
H A Dcoresight-cpu-debug.c31 #define EDPCSR 0x0A0 macro
215 drvdata->edpcsr = readl_relaxed(drvdata->base + EDPCSR); in debug_read_regs()