Searched refs:DispClocks (Results 1 – 14 of 14) sorted by relevance
105 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member131 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
926 max_dispclk = find_max_clk_value(clock_table->DispClocks, in dcn35_clk_mgr_helper_populate_bw_params()994 find_max_clk_value(clock_table->DispClocks, NUM_DISPCLK_DPM_LEVELS); in dcn35_clk_mgr_helper_populate_bw_params()1195 smu_dpm_clks_b->dpm_clks->DispClocks[i] = smu_dpm_clks_a->dpm_clks->DispClocks[i]; in translate_to_DpmClocks_t_dcn35()1350 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn35_clk_mgr_construct()
122 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member151 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
112 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
123 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
124 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
129 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
51 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
71 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
516 bw_params->clk_table.entries[i].dispclk_mhz = clock_table->DispClocks[i]; in dcn315_clk_mgr_helper_populate_bw_params()532 …bw_params->clk_table.entries[i-1].dispclk_mhz = clock_table->DispClocks[clock_table->NumDispClkLev… in dcn315_clk_mgr_helper_populate_bw_params()696 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn315_clk_mgr_construct()
79 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
511 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn316_clk_mgr_helper_populate_bw_params()
100 uint32_t DispClocks[VG_NUM_DISPCLK_DPM_LEVELS]; member
132 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member