Searched refs:DWB_UPDATE_CTRL (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.c | 138 REG_GET(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, &pre_locked); in dwb3_set_fc_enable()
142 REG_UPDATE(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, 1); in dwb3_set_fc_enable()
149 REG_UPDATE(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, 0); in dwb3_set_fc_enable()
166 REG_GET(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, &pre_locked); in dwb3_update()
171 REG_UPDATE(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, 1); in dwb3_update()
187 REG_UPDATE(DWB_UPDATE_CTRL, DWB_UPDATE_LOCK, 0); in dwb3_update()
|
| H A D | dcn30_dwb.h | 38 SR(DWB_UPDATE_CTRL),\
162 SF_DWB2(DWB_UPDATE_CTRL, DWB_TOP, 0, DWB_UPDATE_LOCK, mask_sh),\
163 SF_DWB2(DWB_UPDATE_CTRL, DWB_TOP, 0, DWB_UPDATE_PENDING, mask_sh),\
727 uint32_t DWB_UPDATE_CTRL; member
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 574 SR_ARR(FC_SOURCE_SIZE, id), SR_ARR(DWB_UPDATE_CTRL, id), \
|