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Searched refs:DUMPREG (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/media/platform/ti/vpe/
H A Dsc.c25 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs() macro
30 DUMPREG(SC0); in sc_dump_regs()
31 DUMPREG(SC1); in sc_dump_regs()
32 DUMPREG(SC2); in sc_dump_regs()
33 DUMPREG(SC3); in sc_dump_regs()
34 DUMPREG(SC4); in sc_dump_regs()
35 DUMPREG(SC5); in sc_dump_regs()
36 DUMPREG(SC6); in sc_dump_regs()
37 DUMPREG(SC8); in sc_dump_regs()
38 DUMPREG(SC9); in sc_dump_regs()
[all …]
H A Dcsc.c114 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in csc_dump_regs() macro
119 DUMPREG(CSC00); in csc_dump_regs()
120 DUMPREG(CSC01); in csc_dump_regs()
121 DUMPREG(CSC02); in csc_dump_regs()
122 DUMPREG(CSC03); in csc_dump_regs()
123 DUMPREG(CSC04); in csc_dump_regs()
124 DUMPREG(CSC05); in csc_dump_regs()
126 #undef DUMPREG in csc_dump_regs()
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_wp.c23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump() macro
25 DUMPREG(HDMI_WP_REVISION); in hdmi_wp_dump()
26 DUMPREG(HDMI_WP_SYSCONFIG); in hdmi_wp_dump()
27 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_dump()
28 DUMPREG(HDMI_WP_IRQSTATUS); in hdmi_wp_dump()
29 DUMPREG(HDMI_WP_IRQENABLE_SET); in hdmi_wp_dump()
30 DUMPREG(HDMI_WP_IRQENABLE_CLR); in hdmi_wp_dump()
31 DUMPREG(HDMI_WP_IRQWAKEEN); in hdmi_wp_dump()
32 DUMPREG(HDMI_WP_PWR_CTRL); in hdmi_wp_dump()
33 DUMPREG(HDMI_WP_DEBOUNCE); in hdmi_wp_dump()
[all …]
H A Ddss.c375 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) in dss_dump_regs() macro
380 DUMPREG(DSS_REVISION); in dss_dump_regs()
381 DUMPREG(DSS_SYSCONFIG); in dss_dump_regs()
382 DUMPREG(DSS_SYSSTATUS); in dss_dump_regs()
383 DUMPREG(DSS_CONTROL); in dss_dump_regs()
387 DUMPREG(DSS_SDI_CONTROL); in dss_dump_regs()
388 DUMPREG(DSS_PLL_CONTROL); in dss_dump_regs()
389 DUMPREG(DSS_SDI_STATUS); in dss_dump_regs()
393 #undef DUMPREG in dss_dump_regs()
/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_wp.c22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump() macro
24 DUMPREG(HDMI_WP_REVISION); in hdmi_wp_dump()
25 DUMPREG(HDMI_WP_SYSCONFIG); in hdmi_wp_dump()
26 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_dump()
27 DUMPREG(HDMI_WP_IRQSTATUS); in hdmi_wp_dump()
28 DUMPREG(HDMI_WP_IRQENABLE_SET); in hdmi_wp_dump()
29 DUMPREG(HDMI_WP_IRQENABLE_CLR); in hdmi_wp_dump()
30 DUMPREG(HDMI_WP_IRQWAKEEN); in hdmi_wp_dump()
31 DUMPREG(HDMI_WP_PWR_CTRL); in hdmi_wp_dump()
32 DUMPREG(HDMI_WP_DEBOUNCE); in hdmi_wp_dump()
[all …]
H A Ddispc.c3349 #define DUMPREG(dispc, r) \ in dispc_dump_regs() macro
3356 DUMPREG(dispc, DISPC_REVISION); in dispc_dump_regs()
3357 DUMPREG(dispc, DISPC_SYSCONFIG); in dispc_dump_regs()
3358 DUMPREG(dispc, DISPC_SYSSTATUS); in dispc_dump_regs()
3359 DUMPREG(dispc, DISPC_IRQSTATUS); in dispc_dump_regs()
3360 DUMPREG(dispc, DISPC_IRQENABLE); in dispc_dump_regs()
3361 DUMPREG(dispc, DISPC_CONTROL); in dispc_dump_regs()
3362 DUMPREG(dispc, DISPC_CONFIG); in dispc_dump_regs()
3363 DUMPREG(dispc, DISPC_CAPABLE); in dispc_dump_regs()
3364 DUMPREG(dispc, DISPC_LINE_STATUS); in dispc_dump_regs()
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H A Ddss.c360 #define DUMPREG(dss, r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(dss, r)) in dss_dump_regs() macro
365 DUMPREG(dss, DSS_REVISION); in dss_dump_regs()
366 DUMPREG(dss, DSS_SYSCONFIG); in dss_dump_regs()
367 DUMPREG(dss, DSS_SYSSTATUS); in dss_dump_regs()
368 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
371 DUMPREG(dss, DSS_SDI_CONTROL); in dss_dump_regs()
372 DUMPREG(dss, DSS_PLL_CONTROL); in dss_dump_regs()
373 DUMPREG(dss, DSS_SDI_STATUS); in dss_dump_regs()
377 #undef DUMPREG in dss_dump_regs()