Searched refs:DSS_CONTROL (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | dss.c | 50 #define DSS_CONTROL DSS_REG(0x0040) macro
382 DUMPREG(DSS_CONTROL); in dss_dump_regs()
417 REG_FLD_MOD(DSS_CONTROL, b, start, end); /* DISPC_CLK_SWITCH */ in dss_select_dispc_clk_source()
445 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ in dss_select_dsi_clk_source()
480 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* LCDx_CLK_SWITCH */ in dss_select_lcd_clk_source()
616 REG_FLD_MOD(DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
621 REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */ in dss_set_dac_pwrdn_bgz()
635 REG_FLD_MOD(DSS_CONTROL, src, 15, 15); /* VENC_HDMI_SWITCH */ in dss_select_hdmi_venc_clk_source()
649 return REG_GET(DSS_CONTROL, 15, 15); in dss_get_hdmi_venc_clk_source()
675 REG_FLD_MOD(DSS_CONTROL, val, 17, 17); in dss_dpi_select_source_omap4()
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| /linux/drivers/gpu/drm/omapdrm/dss/ |
| H A D | dss.c | 50 #define DSS_CONTROL DSS_REG(0x0040) macro
368 DUMPREG(dss, DSS_CONTROL); in dss_dump_regs()
432 REG_FLD_MOD(dss, DSS_CONTROL, b, /* DISPC_CLK_SWITCH */ in dss_select_dispc_clk_source()
462 REG_FLD_MOD(dss, DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */ in dss_select_dsi_clk_source()
482 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
490 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
514 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
521 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
543 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
550 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
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| /linux/arch/arm/mach-omap2/ |
| H A D | display.c | 40 #define DSS_CONTROL 0x40 macro
397 omap_hwmod_write(0x0, oh, DSS_CONTROL); in omap_dss_reset()
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