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Searched refs:DSC_TOP_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/
H A Ddcn35_dsc.c94 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc35_enable()
101 REG_UPDATE(DSC_TOP_CONTROL, in dsc35_enable()
111 REG_UPDATE(DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, !enable); in dsc35_set_fgcg()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c124 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &s->dsc_clock_en); in dsc401_read_state()
172 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc401_enable()
179 REG_UPDATE(DSC_TOP_CONTROL, in dsc401_enable()
195 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc401_disable()
203 REG_UPDATE(DSC_TOP_CONTROL, in dsc401_disable()
417 REG_UPDATE(DSC_TOP_CONTROL, DSC_FGCG_REP_DIS, !enable); in dsc401_set_fgcg()
H A Ddcn401_dsc.h203 uint32_t DSC_TOP_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c153 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &s->dsc_clock_en); in dsc2_read_state()
235 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc2_enable()
242 REG_UPDATE(DSC_TOP_CONTROL, in dsc2_enable()
258 REG_GET(DSC_TOP_CONTROL, DSC_CLOCK_EN, &dsc_clock_en); in dsc2_disable()
266 REG_UPDATE(DSC_TOP_CONTROL, in dsc2_disable()
H A Ddcn20_dsc.h35 SRI(DSC_TOP_CONTROL, DSC_TOP, id),\
462 uint32_t DSC_TOP_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h417 SRI_ARR(DSC_TOP_CONTROL, DSC_TOP, id), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h721 SRI_ARR(DSC_TOP_CONTROL, DSC_TOP, id), \