Searched refs:DSCEnabled (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 320 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
|
| H A D | display_mode_vba_32.c | 336 if ((mode_lib->vba.BlendingAndTiming[k] != k) || !mode_lib->vba.DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
364 v->DSCDelay[k] = dml32_DSCDelayRequirement(mode_lib->vba.DSCEnabled[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
375 if (j != k && mode_lib->vba.BlendingAndTiming[k] == j && mode_lib->vba.DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3748 mode_lib->vba.DSCEnabled[k] = mode_lib->vba.RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml32_ModeSupportAndSystemConfigurationFull()
|
| H A D | display_mode_vba_util_32.c | 1717 unsigned int dml32_DSCDelayRequirement(bool DSCEnabled, in dml32_DSCDelayRequirement() argument
1732 if (DSCEnabled == true && OutputBpp != 0) { in dml32_DSCDelayRequirement()
1757 dml_print("DML::%s: DSCEnabled = %d\n", __func__, DSCEnabled); in dml32_DSCDelayRequirement()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core_structs.h | 658 …dml_bool_t DSCEnabled[__DML_NUM_PLANES__]; /// <brief Indicate if the DSC is enabled; used in mode… member
794 …dml_bool_t DSCEnabled[__DML_NUM_PLANES__]; /// <brief Indicate if the DSC is actually required; us… member
|
| H A D | display_mode_util.c | 615 dml_print("DML: hw_resource: plane=%d, DSCEnabled = %d\n", i, hw->DSCEnabled[i]); in dml_print_dml_display_cfg_hw_resource()
|
| H A D | display_mode_core.c | 735 dml_bool_t DSCEnabled,
5871 dml_bool_t DSCEnabled, in DSCDelayRequirement() argument
5885 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
5903 dml_print("DML::%s: DSCEnabled = %u\n", __func__, DSCEnabled); in DSCDelayRequirement()
8259 mode_lib->ms.support.DSCEnabled[k] = mode_lib->ms.RequiresDSC[k]; in dml_core_mode_support()
8592 …display_cfg.plane.BlendingAndTiming[k] != k) || !mode_lib->ms.cache_display_cfg.hw.DSCEnabled[k]) { in dml_core_mode_programming()
8614 locals->DSCDelay[k] = DSCDelayRequirement(mode_lib->ms.cache_display_cfg.hw.DSCEnabled[k], in dml_core_mode_programming()
8629 …che_display_cfg.plane.BlendingAndTiming[k] == j && mode_lib->ms.cache_display_cfg.hw.DSCEnabled[j]) in dml_core_mode_programming()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.h | 508 bool DSCEnabled[DC__NUM_DPP__MAX]; member
|
| H A D | display_mode_vba.c | 647 mode_lib->vba.DSCEnabled[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 2003 if ((v->BlendingAndTiming[k] != k) || !v->DSCEnabled[k]) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2030 if (v->DSCEnabled[k] && BPP != 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2065 && v->DSCEnabled[j]) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3728 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 4495 bool DSCEnabled, in DSCDelayRequirement() argument
4510 if (DSCEnabled == true && OutputBpp != 0) { in DSCDelayRequirement()
4529 DML_LOG_VERBOSE("DML::%s: DSCEnabled= %u\n", __func__, DSCEnabled); in DSCDelayRequirement()
9605 mode_lib->ms.support.DSCEnabled[k] = mode_lib->ms.RequiresDSC[k]; in dml_core_mode_support()
9613 …DML_LOG_VERBOSE("DML::%s: k=%d, DSCEnabled = %u\n", __func__, k, mode_lib->ms.support.DSCEnabled[k… in dml_core_mode_support()
13082 out->informative.mode_support_info.DSCEnabled[k] = mode_lib->ms.support.DSCEnabled[k]; in dml2_core_calcs_get_informative()
|