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Searched refs:DSCEnable (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h224 bool DSCEnable,
267 bool DSCEnable,
297 bool DSCEnable,
310 bool DSCEnable,
H A Ddisplay_mode_vba_util_32.c1189 bool DSCEnable, in dml32_CalculateODMMode() argument
1232 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1244 (DSCEnable && (HActive > MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode()
1354 bool DSCEnable, in dml32_CalculateOutputLink() argument
1386 if (DSCEnable == true) { in dml32_CalculateOutputLink()
1410 if (*OutBpp == 0 && PHYCLKD32PerState < 13500.0 / 32 && DSCEnable == true && in dml32_CalculateOutputLink()
1433 if (*OutBpp == 0 && PHYCLKD32PerState < 20000 / 32 && DSCEnable == true && in dml32_CalculateOutputLink()
1455 if (*OutBpp == 0 && DSCEnable == true && ForcedOutputLinkBPP == 0) { in dml32_CalculateOutputLink()
1478 if (*OutBpp == 0 && PHYCLKPerState < 540 && DSCEnable == true && in dml32_CalculateOutputLink()
1503 if (*OutBpp == 0 && PHYCLKPerState < 810 && DSCEnable == true && in dml32_CalculateOutputLink()
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H A Ddisplay_mode_vba_32.c2105 mode_lib->vba.DSCEnable[k], in dml32_ModeSupportAndSystemConfigurationFull()
2361 if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.ForcedOutputLinkBPP[k] != 0) in dml32_ModeSupportAndSystemConfigurationFull()
2363 if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.OutputFormat[k] == dm_n422 in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core.c92 enum dml_dsc_enable DSCEnable,
112 dml_bool_t DSCEnable,
381 dml_bool_t DSCEnable,
443 dml_bool_t DSCEnable,
2713 dml_bool_t DSCEnable, in TruncToValidBPP() argument
2766 } else if (DSCEnable && Output == dml_dp) { in TruncToValidBPP()
2772 if (DSCEnable) { in TruncToValidBPP()
2793 if (DSCEnable) { in TruncToValidBPP()
2813 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP =… in TruncToValidBPP()
2814 (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) { in TruncToValidBPP()
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H A Ddisplay_mode_core_structs.h627 …enum dml_dsc_enable DSCEnable[__DML_NUM_PLANES__]; //< brief for mode support check; use to determ… member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c1273 bool DSCEnable, in TruncToValidBPP() argument
1328 } else if (DSCEnable && Output == dml2_dp) { in TruncToValidBPP()
1334 ODMMode = DSCEnable ? ODMModeDSC : ODMModeNoDSC; in TruncToValidBPP()
1341 if (DSCEnable) { in TruncToValidBPP()
1361 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP =… in TruncToValidBPP()
1362 (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) { in TruncToValidBPP()
4115 bool DSCEnable, in CalculateODMMode() argument
4139 bool UseDSC = DSCEnable && (NumberOfDSCSlices > 0); in CalculateODMMode()
4150 DML_LOG_VERBOSE("DML::%s: DSCEnable = %d\n", __func__, DSCEnable); in CalculateODMMode()
4228 enum dml2_dsc_enable_option DSCEnable, in CalculateOutputLink() argument
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/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h1072 bool DSCEnable[DC__NUM_DPP__MAX]; member
H A Ddisplay_mode_vba.c648 mode_lib->vba.DSCEnable[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c3282 bool DSCEnable, in TruncToValidBPP() argument
3324 if (DSCEnable && Output == dm_dp) { in TruncToValidBPP()
3338 if (DSCEnable) { in TruncToValidBPP()
3358 …if (!((DSCEnable == false && (DesiredBPP == NonDSCBPP2 || DesiredBPP == NonDSCBPP1 || DesiredBPP =… in TruncToValidBPP()
3359 (DSCEnable && DesiredBPP >= MinDSCBPP && DesiredBPP <= MaxDSCBPP))) { in TruncToValidBPP()
3904 if (v->DSCEnable[k] == true) { in dml30_ModeSupportAndSystemConfigurationFull()