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Searched refs:DSCC_PPS_CONFIG7 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c131 REG_GET(DSCC_PPS_CONFIG7, SLICE_BPG_OFFSET, &s->dsc_slice_bpg_offset); in dsc401_read_state()
309 REG_SET_2(DSCC_PPS_CONFIG7, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h219 uint32_t DSCC_PPS_CONFIG7; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.h48 SRI(DSCC_PPS_CONFIG7, DSCC, id),\
475 uint32_t DSCC_PPS_CONFIG7; member
H A Ddcn20_dsc.c160 REG_GET(DSCC_PPS_CONFIG7, SLICE_BPG_OFFSET, &s->dsc_slice_bpg_offset); in dsc2_read_state()
669 REG_SET_2(DSCC_PPS_CONFIG7, 0, in dsc_write_to_registers()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h432 SRI_ARR(DSCC_PPS_CONFIG7, DSCC, id), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h733 SRI_ARR(DSCC_PPS_CONFIG7, DSCC, id), \