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Searched refs:DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h22956 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_0_1_sh_mask.h38279 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_2_1_sh_mask.h42488 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_2_1_0_sh_mask.h45043 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_5_1_sh_mask.h36980 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_5_0_sh_mask.h37001 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_1_2_sh_mask.h47255 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_1_5_sh_mask.h45527 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_1_6_sh_mask.h48873 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_1_4_sh_mask.h49575 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_0_2_sh_mask.h44358 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_2_0_0_sh_mask.h51610 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_0_0_sh_mask.h51009 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro
H A Ddcn_3_2_0_sh_mask.h42479 #define DSCC1_DSCC_PPS_CONFIG5__SCALE_INCREMENT_INTERVAL_MASK … macro