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Searched refs:DRRDisplay (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h591 bool DRRDisplay[],
684 bool DRRDisplay,
H A Ddisplay_mode_vba_util_32.c2925 bool DRRDisplay[], in dml32_UseMinimumDCFCLK() argument
3049 DRRDisplay[k], in dml32_UseMinimumDCFCLK()
3252 bool DRRDisplay, in dml32_CalculateTWait() argument
3264 !(SynchronizeDRRDisplaysForUCLKPStateChangeFinal && DRRDisplay)) { in dml32_CalculateTWait()
4500 (v->DRRDisplay[i] || v->DRRDisplay[j]))) { in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
H A Ddisplay_mode_vba_32.c756 mode_lib->vba.DRRDisplay[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3056 mode_lib->vba.DRRDisplay, in dml32_ModeSupportAndSystemConfigurationFull()
3262 mode_lib->vba.DRRDisplay[k], in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h613 dml_bool_t DRRDisplay[__DML_NUM_PLANES__]; member
1273 dml_bool_t *DRRDisplay; member
1340 dml_bool_t *DRRDisplay; member
H A Ddisplay_mode_core.c280 dml_bool_t DRRDisplay,
1744 dml_bool_t DRRDisplay, in CalculateTWait() argument
1754 …l_pstate_change_phantom_pipe) && !(SynchronizeDRRDisplaysForUCLKPStateChangeFinal && DRRDisplay)) { in CalculateTWait()
2983 (p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && (p->DRRDisplay[i] || p->DRRDisplay[j]))) { in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2997 …eSupportNumber = ((p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && p->DRRDisplay[k]) ? 2 : 1); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2999 …} else if (((s->FCLKChangeSupportNumber == 1) && (p->DRRDisplay[k] || (!s->SynchronizedSurfaces[s-… in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3028 …geSupportNumber = (p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && p->DRRDisplay[k]) ? 2 : 1; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3030 …} else if (((s->DRAMClockChangeSupportNumber == 1) && (p->DRRDisplay[k] || !s->SynchronizedSurface… in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4635 p->DRRDisplay[k], in UseMinimumDCFCLK()
6358 mode_lib->ms.cache_display_cfg.timing.DRRDisplay[k], in dml_prefetch_check()
[all …]
H A Ddisplay_mode_util.c539 dml_print("DML: timing_cfg: plane=%d, DRRDisplay = %d\n", i, timing->DRRDisplay[i]); in dml_print_dml_display_cfg_timing()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h452 bool DRRDisplay[DC__NUM_DPP__MAX]; member
H A Ddisplay_mode_vba.c708 mode_lib->vba.DRRDisplay[mode_lib->vba.NumberOfActiveSurfaces] = dst->drr_display; in fetch_pipe_params()