Searched refs:DRAMClockChangeLatency (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 85 double DRAMClockChangeLatency; member
146 double DRAMClockChangeLatency; member
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| H A D | display_mode_vba.h | 362 double DRAMClockChangeLatency; member
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| H A D | display_mode_vba.c | 358 mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us; in fetch_socbb_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 685 double DRAMClockChangeLatency,
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| H A D | display_mode_vba_32.c | 761 mode_lib->vba.DRAMClockChangeLatency, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1186 v->dummy_vars.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.mmSOCParameters.DRAMClockChangeLatency = mode_lib->vba.DRAMClockChangeLatency; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3075 mode_lib->vba.DRAMClockChangeLatency, in dml32_ModeSupportAndSystemConfigurationFull()
3278 mode_lib->vba.DRAMClockChangeLatency, in dml32_ModeSupportAndSystemConfigurationFull()
3590 v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.mSOCParameters.DRAMClockChangeLatency = mode_lib->vba.DRAMClockChangeLatency; in dml32_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_shared_types.h | 1035 double DRAMClockChangeLatency;
1034 double DRAMClockChangeLatency; global() member
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| H A D | dml2_core_dcn4_calcs.c | 6750 p->Watermark->DRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->Watermark->UrgentWatermark; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6767 DML_LOG_VERBOSE("DML::%s: DRAMClockChangeLatency = %f\n", __func__, p->mmSOCParameters.DRAMClockChangeLatency); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6797 p->Watermark->WritebackDRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->mmSOCParameters.WritebackLatency; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6800 p->Watermark->WritebackDRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6910 p->MaxActiveDRAMClockChangeLatencySupported[k] = dml_is_phantom_pipe(&p->display_cfg->plane_descriptors[k]) ? 0 : (s->ActiveDRAMClockChangeLatencyMargin[k] + p->mmSOCParameters.DRAMClockChangeLatency); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6927 (s->ActiveDRAMClockChangeLatencyMargin[k] > 0 && reserved_vblank_time_us >= p->mmSOCParameters.DRAMClockChangeLatency)) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6931 else if (reserved_vblank_time_us >= p->mmSOCParameters.DRAMClockChangeLatency) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6935 else if (uclk_pstate_change_strategy == dml2_uclk_pstate_change_strategy_force_vblank && reserved_vblank_time_us >= p->mmSOCParameters.DRAMClockChangeLatency) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6947 s->dst_y_pstate = (unsigned int)(math_ceil2((p->mmSOCParameters.DRAMClockChangeLatency in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 283 dml_float_t DRAMClockChangeLatency,
1747 dml_float_t DRAMClockChangeLatency, in CalculateTWait()
1757 TWait = dml_max3(DRAMClockChangeLatency + UrgentLatency, SREnterPlusExitTime, UrgentLatency); in CalculateTWait()
2874 p->Watermark->DRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->Watermark->UrgentWatermark; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2884 dml_print("DML::%s: DRAMClockChangeLatency = %f\n", __func__, p->mmSOCParameters.DRAMClockChangeLatency); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2911 p->Watermark->WritebackDRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->mmSOCParameters.WritebackLatency; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2914 p->Watermark->WritebackDRAMClockChangeWatermark = p->mmSOCParameters.DRAMClockChangeLatency + p->mmSOCParameters.WritebackLatency + p->WritebackChunkSize * 1024.0 / 32.0 / p->SOCCLK; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
2999 p->MaxActiveDRAMClockChangeLatencySupported[k] = (p->UseMALLForPStateChange[k] == dml_use_mall_pstate_change_phantom_pipe) ? 0 : (s->ActiveDRAMClockChangeLatencyMargin[k] + p->mmSOCParameters.DRAMClockChangeLatency); in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3112 s->dst_y_pstate = (dml_uint_t)(dml_ceil((p->mmSOCParameters.DRAMClockChangeLatency in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
1745 CalculateTWait(dml_uint_t PrefetchMode,enum dml_use_mall_for_pstate_change_mode UseMALLForPStateChange,dml_bool_t SynchronizeDRRDisplaysForUCLKPStateChangeFinal,dml_bool_t DRRDisplay,dml_float_t DRAMClockChangeLatency,dml_float_t FCLKChangeLatency,dml_float_t UrgentLatency,dml_float_t SREnterPlusExitTime) CalculateTWait() argument
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| H A D | display_mode_core_structs.h | 512 dml_float_t DRAMClockChangeLatency; member
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