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Searched refs:DP_LINK_STATUS_SIZE (Results 1 – 17 of 17) sorted by relevance

/linux/include/drm/display/
H A Ddrm_dp_helper.h36 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
38 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
40 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
42 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
44 u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
61 bool drm_dp_128b132b_lane_channel_eq_done(const u8 link_status[DP_LINK_STATUS_SIZE],
63 bool drm_dp_128b132b_lane_symbol_locked(const u8 link_status[DP_LINK_STATUS_SIZE],
65 bool drm_dp_128b132b_eq_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE]);
66 bool drm_dp_128b132b_cds_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE]);
67 bool drm_dp_128b132b_link_training_failed(const u8 link_status[DP_LINK_STATUS_SIZE]);
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H A Ddrm_dp.h1652 #define DP_LINK_STATUS_SIZE 6 macro
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.h28 const u8 link_status[DP_LINK_STATUS_SIZE]);
44 const u8 link_status[DP_LINK_STATUS_SIZE]);
H A Dintel_dp_link_training.c404 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_tx_ffe_preset() argument
424 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_vswing_preemph() argument
460 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_train() argument
498 const u8 link_status[DP_LINK_STATUS_SIZE]) in intel_dp_get_adjust_train() argument
824 const u8 old_link_status[DP_LINK_STATUS_SIZE], in intel_dp_adjust_request_changed() argument
825 const u8 new_link_status[DP_LINK_STATUS_SIZE]) in intel_dp_adjust_request_changed() argument
851 const u8 link_status[DP_LINK_STATUS_SIZE]) in intel_dp_dump_link_status() argument
868 u8 old_link_status[DP_LINK_STATUS_SIZE] = {}; in intel_dp_link_training_clock_recovery()
870 u8 link_status[DP_LINK_STATUS_SIZE]; in intel_dp_link_training_clock_recovery()
1022 u8 link_status[DP_LINK_STATUS_SIZE]; in intel_dp_link_training_channel_equalization()
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H A Dintel_dp.c4845 u8 link_status[DP_LINK_STATUS_SIZE]) in intel_dp_link_ok() argument
4887 u8 link_status[DP_LINK_STATUS_SIZE] = {}; in intel_dp_mst_link_status()
4888 const size_t esi_link_status_size = DP_LINK_STATUS_SIZE - 2; in intel_dp_mst_link_status()
4999 u8 link_status[DP_LINK_STATUS_SIZE]; in intel_dp_needs_link_retrain()
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c74 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) in dp_link_status() argument
79 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], in dp_get_lane_status() argument
89 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_channel_eq_ok() argument
109 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_clock_recovery_ok() argument
124 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_get_adjust_request_voltage() argument
137 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_get_adjust_request_pre_emphasis() argument
151 u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_get_adjust_tx_ffe_preset() argument
165 bool drm_dp_128b132b_lane_channel_eq_done(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_128b132b_lane_channel_eq_done() argument
185 bool drm_dp_128b132b_lane_symbol_locked(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_128b132b_lane_symbol_locked() argument
201 bool drm_dp_128b132b_eq_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE]) in drm_dp_128b132b_eq_interlane_align_done() argument
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/linux/drivers/gpu/drm/tegra/
H A Ddp.c548 u8 status[DP_LINK_STATUS_SIZE]) in drm_dp_link_get_adjustments() argument
597 u8 status[DP_LINK_STATUS_SIZE]; in drm_dp_link_recover_clock()
647 u8 status[DP_LINK_STATUS_SIZE]; in drm_dp_link_equalize_channel()
790 u8 status[DP_LINK_STATUS_SIZE]; in drm_dp_link_train_fast()
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c496 u8 link_status[DP_LINK_STATUS_SIZE]) in cdns_mhdp_adjust_lt() argument
524 sizeof(hdr) + DP_LINK_STATUS_SIZE); in cdns_mhdp_adjust_lt()
537 DP_LINK_STATUS_SIZE); in cdns_mhdp_adjust_lt()
929 u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_get_adjust_train() argument
973 void cdns_mhdp_set_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_set_adjust_request_voltage() argument
986 void cdns_mhdp_set_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_set_adjust_request_pre_emphasis() argument
999 u8 link_status[DP_LINK_STATUS_SIZE]) in cdns_mhdp_adjust_requested_eq() argument
1048 u8 link_status[DP_LINK_STATUS_SIZE]; in cdns_mhdp_link_training_channel_eq()
1109 u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_adjust_requested_cr() argument
1133 u8 after_cr[DP_LINK_STATUS_SIZE], u8 *req_volt, in cdns_mhdp_validate_cr() argument
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c203 static void amdgpu_atombios_dp_get_adjust_train(const u8 link_status[DP_LINK_STATUS_SIZE], in amdgpu_atombios_dp_get_adjust_train() argument
458 u8 link_status[DP_LINK_STATUS_SIZE]; in amdgpu_atombios_dp_needs_link_train()
497 u8 link_status[DP_LINK_STATUS_SIZE];
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c268 uint8_t link_status[DP_LINK_STATUS_SIZE];
1234 DP_LINK_STATUS_SIZE); in cdv_intel_dp_get_link_status()
1238 cdv_intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_dp_link_status() argument
1245 cdv_intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_get_adjust_request_voltage() argument
1258 cdv_intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_get_adjust_request_pre_emphasis() argument
1302 cdv_intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_get_lane_status() argument
1314 cdv_intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count) in cdv_intel_clock_recovery_ok() argument
/linux/drivers/gpu/drm/radeon/
H A Datombios_dp.c252 static void dp_get_adjust_train(const u8 link_status[DP_LINK_STATUS_SIZE], in dp_get_adjust_train() argument
501 u8 link_status[DP_LINK_STATUS_SIZE]; in radeon_dp_needs_link_train()
542 u8 link_status[DP_LINK_STATUS_SIZE];
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c356 u8 stat[DP_LINK_STATUS_SIZE]; in nouveau_dp_train_link()
465 u8 link_status[DP_LINK_STATUS_SIZE]; in nouveau_dp_link_check_locked()
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_ctrl.c1109 if (len != DP_LINK_STATUS_SIZE) { in msm_dp_ctrl_read_link_status()
1121 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_link_train_1()
1229 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_link_train_2()
1785 const u8 link_status[DP_LINK_STATUS_SIZE], in msm_dp_ctrl_clock_recovery_any_ok() argument
1805 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_channel_eq_ok()
1820 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_on_link()
/linux/drivers/gpu/drm/rockchip/
H A Dcdn-dp-core.c578 u8 link_status[DP_LINK_STATUS_SIZE]; in cdn_dp_check_link_status()
586 DP_LINK_STATUS_SIZE)) { in cdn_dp_check_link_status()
/linux/drivers/gpu/drm/bridge/
H A Dite-it6505.c1696 u8 link_status[DP_LINK_STATUS_SIZE] = { 0 }; in it6505_step_cr_train()
1769 u8 loop_count = 0, i, link_status[DP_LINK_STATUS_SIZE] = { 0 }; in it6505_step_eq_train()
2101 u8 link_status[DP_LINK_STATUS_SIZE] = { 0 }; in it6505_hdcp_work()
2282 u8 link_status[DP_LINK_STATUS_SIZE]; in it6505_process_hpd_irq()
H A Dtc358767.c1086 u8 tmp[DP_LINK_STATUS_SIZE]; in tc_main_link_enable()
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c1603 u8 link_status[DP_LINK_STATUS_SIZE] = {}; in mtk_dp_train_cr()
1674 u8 link_status[DP_LINK_STATUS_SIZE] = {}; in mtk_dp_train_eq()