Home
last modified time | relevance | path

Searched refs:DP_LANE_ALIGN_STATUS_UPDATED (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_irq_handler.c301 DP_LANE_ALIGN_STATUS_UPDATED, in read_dpcd204h_on_irq_hpd()
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c97 DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_channel_eq_ok()
171 lane_align = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_lane_channel_eq_done()
203 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_eq_interlane_align_done()
212 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_cds_interlane_align_done()
221 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_link_training_failed()
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c476 retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_process_equalizer_training()
655 ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_fast_link_train()
/linux/include/drm/display/
H A Ddrm_dp.h785 #define DP_LANE_ALIGN_STATUS_UPDATED 0x204 macro
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_link.c985 if (get_link_status(link->link_status, DP_LANE_ALIGN_STATUS_UPDATED) & in dp_link_process_ds_port_status_change()
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c1340 DP_LANE_ALIGN_STATUS_UPDATED); in cdv_intel_channel_eq_ok()