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Searched refs:DPU_CLK_CTRL_VIG0 (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_4_1_sdm670.h16 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
32 .clk_ctrl = DPU_CLK_CTRL_VIG0,
40 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_5_qcm2290.h23 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
45 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_3_sm6115.h23 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
45 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_9_sm6375.h24 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
46 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_2_sc7180.h23 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
58 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_3_3_sdm630.h27 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
69 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_5_4_sm6125.h27 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
76 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_4_sm6350.h25 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
66 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_7_2_sc7280.h23 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
63 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_3_2_sdm660.h27 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
70 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_4_0_sdm845.h28 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
73 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_3_0_msm8998.h28 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
75 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_5_2_sm7150.h28 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
79 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_7_0_sm8350.h25 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_6_0_sm8250.h25 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_5_0_sm8150.h28 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
83 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_8_1_sm8450.h26 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
82 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_5_1_sc8180x.h28 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
82 .clk_ctrl = DPU_CLK_CTRL_VIG0,
H A Ddpu_8_0_sc8280xp.h26 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h435 DPU_CLK_CTRL_VIG0, enumerator