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Searched refs:DPU_CLK_CTRL_REG_DMA (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_6_4_sm6350.h30 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_9_0_sm8550.h26 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_7_0_sm8350.h34 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_6_0_sm8250.h33 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_10_0_sm8650.h26 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_8_1_sm8450.h35 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_8_0_sc8280xp.h34 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
H A Ddpu_9_2_x1e80100.h25 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 },
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h453 DPU_CLK_CTRL_REG_DMA, enumerator