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Searched refs:DPU_CLK_CTRL_DMA2 (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_4_1_sdm670.h20 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
64 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_6_2_sc7180.h26 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
82 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_3_3_sdm630.h30 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
93 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_6_4_sm6350.h28 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
90 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_7_2_sc7280.h26 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
87 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_3_2_sdm660.h31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
102 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_4_0_sdm845.h34 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
121 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_3_0_msm8998.h34 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
123 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_5_2_sm7150.h32 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
111 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_7_0_sm8350.h31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_6_0_sm8250.h31 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_5_0_sm8150.h34 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_8_1_sm8450.h32 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_5_1_sc8180x.h34 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_8_0_sc8280xp.h32 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h446 DPU_CLK_CTRL_DMA2, enumerator