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Searched refs:DPP_TOP0_DPP_CRC_VAL_R_G (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.h272 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
336 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
383 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
407 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
444 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
496 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
556 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
645 uint32_t DPP_TOP0_DPP_CRC_VAL_R_G; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h189 SR(DPP_TOP0_DPP_CRC_VAL_R_G), \
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c140 REG_READ(DPP_TOP0_DPP_CRC_VAL_B_A), REG_READ(DPP_TOP0_DPP_CRC_VAL_R_G)); in log_mpc_crc()