Searched refs:DPLL_SYNCLOCK_ENABLE (Results 1 – 2 of 2) sorted by relevance
228 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv()677 dpll |= DPLL_SYNCLOCK_ENABLE; in cdv_intel_crtc_mode_set()723 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); in cdv_intel_crtc_mode_set()
231 #define DPLL_SYNCLOCK_ENABLE (1 << 29) macro