Searched refs:DPLL_MD (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dpll.c | 402 DPLL_MD(dev_priv, crtc->pipe)); in i9xx_dpll_get_hw_state()
1868 intel_de_write(dev_priv, DPLL_MD(dev_priv, pipe), in i9xx_enable_pll()
2040 intel_de_write(dev_priv, DPLL_MD(dev_priv, pipe), hw_state->dpll_md); in vlv_enable_pll()
2041 intel_de_posting_read(dev_priv, DPLL_MD(dev_priv, pipe)); in vlv_enable_pll()
2195 intel_de_write(dev_priv, DPLL_MD(dev_priv, PIPE_B), in chv_enable_pll()
2208 intel_de_write(dev_priv, DPLL_MD(dev_priv, pipe), in chv_enable_pll()
2210 intel_de_posting_read(dev_priv, DPLL_MD(dev_priv, pipe)); in chv_enable_pll()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 780 #define DPLL_MD(dev_priv, pipe) _MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \ macro
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